Quectel EC2 Series User Manual

LTE Module Series
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PCM_CLK
PCM_SYNC
PCM_OUT
MSB
LSB
PCM_IN
125us
MSB
1 2 1615
LSB
Figure 21: Auxiliary Mode Timing
The following table shows the pin definition of PCM and I2C interfaces which can be applied on audio
codec design.
Table 11: Pin Definition of PCM and I2C Interfaces
Pin Name
Pin No.
I/O
Description
Comment
PCM_IN
22
DI
PCM data input
1.8V power domain
PCM_OUT
24
DO
PCM data output
1.8V power domain
PCM_SYNC
28
IO
PCM data frame
synchronization signal
1.8V power domain
PCM_CLK
20
IO
PCM data bit clock
1.8V power domain
I2C_SCL
40
DO
I2C serial clock
Pulled up to 1.8V internally
I2C_SDA
42
IO
I2C serial data
Pulled up to 1.8V internally
Clock and mode can be configured by AT command, and the default configuration is master mode using
short frame synchronization format with 2048kHz PCM_CLK and 8kHz PCM_SYNC. Please refer to
document [2] about AT+QDAI command for details.
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Quectel EC2 Series Specifications

General

Brand	Quectel
Model	EC2 Series
Category	Control Unit
Language	English