Quectel EM05-G - Application Interfaces; (U)SIM Interface

LTE Standard Module Series
EM05-G Hardware Design
EM05-G_Hardware_Design 34 / 69
The reset timing is illustrated by the following figure.
V
IL
 0.5 V
V
H
= 1.8 V
VCC
 150 ms
Resetting
Module
Status
Running
RESET#
Restart
 460 ms
Figure 14: Reset Timing of the Module
Ensure that there is no large capacitance on RESET# pin.
NOTE