Samsung CLP-610ND - 20 Ppm Main Controller Block Diagram(CLP-610)

Samsung Electronics
Service Manual
System Diagram
6-2
SCL/SDA
EEPROM M24C64
3.3V
DC-DC(Core)
5V to
1.0V
1.0V
MII
E-PHY
BCM5241
3.3V
DDR_CLK(1:0)
DQ(15:0)
SA(13:0)
1.81.8 V
/0./0. 9V
DATA(0:15)
nRESET
nF_RESET
RESET
XC61FN3112
3.3V
ADDR(1:11)
DATA(0:7)
ADDR(0:24)
NORFlash
MX29LV128MT
Flash
(16MB,NOR)
3.3V
Modular
Jack
with LED,
COMBO
Platform SOC
CHORUS3
(16bit,360MHz)
@SYS_CLK=120Mhz
ADDR(1:23)
USB_device
ISP1582
3.3V(0.15A) 2.5V(0.15A)
DC-DC
5V to 3.3V
for System
3.3V
to Syste m
I/O
Engine
24V
5V
3.3V
Engine
Controller
LPEC3
3.3V 1.8V
UART
SA(13:0)
DQ(15:0)
SA(13:0)
DQ(15:0)
Panel
LCD module
5V
DC-DC
5V to 1.8V
,0.9V
(DDR2)
1.8V, 0.9V
DDR2 Module
(Extend)
128MB(64MBx2)
or
256MB(128MBx2)
16bit
DDR2 Module
128MB(64MBx2)
16bit
CLP-610 MAIN Controller BlockDiagram
ADDR(1:8)
DATA(0:15)
DATA(0:15)
nRST_LPEC3
6.1.2 20ppm Main Controller Block Diagram(CLP-610)