Seneca Z-SG - Firmware, Communication, and Sensitivity Registers

USER MANUAL – Z-SG
19
Firmware
Revision
Code
Firmware Code
unsigned
16 bit
R Flash
-
40002
1
FpSwap /
ADC
Polarity
Bit [0] ADC Polarity:
0 = ADC is configured for
traction/compression ADC from -31000 to
+31000
1 = ADC is configured only for
compression ADC from 0 to 62000
Bit[8] FpSwap:
Z-SG model Not Used
Z-SG-L model:
0 = Floating Point Values are in H/L format
(standard)
1 = Floating Point Values are in L/H format
Need a reboot
unsigned
16 bit
R/W Flash
0
40003
2
Station
Address /
Parity
Bit [15..8] RS485 Modbus Station Address:
from 1 to 255
Bit [1..0] RS485 Parity:
0 = No Parity
1 = Even Parity
2 = Odd Parity
unsigned
16 bit
R/W Flash
0x010
0
40004
3
BaudRate /
Delay
Bit [15..8] RS485 Baudrate:
0=4800; 1=9600; 2=19200; 3=38400;
4=57600; 5=115200; 6=1200; 7=2400
Bit [7..0] RS485 Delay:
number of the pauses between the end of
Rx message and the start of Tx message)
(from 0x00=0 to 0xFF=255
1 pause=6 characters)
unsigned
16 bit
R/W Flash
3840
0
baud
no
delay
40005
4
Cell_Sensit
ivity
If Dip-Switches 7-8-9 of SW2 are set to
“ON”
the module acquires sensitivity [mV/V]
from here
Floating
Point
32 bit
R/W Flash
2.000
mV/V
40044 -
40045
43-44
Cell Full
Scale
Full Scale Cell Value
Floating
Point
32 bit
R/W Flash
"1000
0.000
"
40046-
40047
45-46
Standard
Weight
Standard Weight to use with “calibration
mode with standard weight”
Floating
Point
32 bit
R/W Flash
"1000
0.000
"
40048-
40049
47-48
100%
Analog Out
Net Weight that will generate 100% of the
analog out
Floating
Point
R/W Flash
"1000
0.000
40050-
40051
49-50