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Sharp HT-CN300 - Page 43

Sharp HT-CN300
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HT-CN300
IC708 VHIAK4586VQ-1: ADC/DAC/DIR Converter (AK4586VQ)
1* XTO OUtput Crystal vibrator output.
2 XTI Input Crystal vibrator input.
EXTCLE Input Master clock input.
3 TVDD Input Power supply for output buffer, 2.7-5.5 V.
4 DVSS Digital GND pin, 0 V.
5 DVDD Input Digital power supply, 4.5-5.5 V.
6* TX Output Transmit channel (through data) output.
7 MCKO Output Master clock output.
8 LRCK Input/Output Input/output channel clock.
9 BICK Input/Output Audio serial data clock.
10 SDTO Output Audio serial data output.
11 SDTI 1 Input DAC 1 audio serial data input.
12 SDTI 2 Input DAC 2 audio serial data input.
13 SDTI 3 Input DAC 3 audio serial data input.
14* INT 0 Output Interrupt 0.
15* INT 1 Output Interrupt 1.
16 CDTO Output Control data output.
CAD 1 Input Chip address 1.
17 CDTI Input Control data input.
SDA Input/Output Control data input/output.
18 CCLK Input Control data clock.
SCL Input Control data clock.
19 CNS Input Chip select.
CAD 0 Input Chip address 0
20* DZF 2 Output Zero input detect 2. (Note 1)
When input data in the group 2 is “0” continuously over 8192 times or RSTN bit is “0”: “H”.
OVF Output Analog input overflow detect. (Note 1)
When analog input of Lch or Rch overflows: “H”
21 AVSS Analog GND pin, 0 V.
22 AVDD Input Analog power supply, 4.5-5.5 V.
23 VREFH Input Reference voltage input, AVDD.
24 VCOM Output Common voltage output, AVDD/2.
25* DZF1 Output Zero input detect.
26 LOUT 3 Output DAC 3 L channel analog output.
27 ROUT 3 Output DAC 3 R channel analog output.
28 LOUT 2 Output DAC 2 L channel analog output.
29 ROUT 2 Output DAC 2 R channel analog output.
30 LOUT 1 Output DAC 1 L channel analog output.
31 ROUT 1 Output DAC 1 L channel analog output.
32 LIN Input L channel analog input.
33 RIN Input R channel analog input.
34 PVDD Input PLL power supply, 4.5-5.5 V.
35 R External resistance.
36 PVSS PLL GND pin, 0 V.
37 RX4 Input Receiver channel input 4 (internal bias pin).
38 SLAVE Input Slave mode.
39* RX2 Input Receiver channel input 3 (internal bias pin).
40 TST Input Test pin.
41 RX2 Input Receiver channel input 2 (internal bias pin).
42 I2C Input Serial control mode select.
43* RX1 Input Receiver channel input 1 (internal bias pin).
44 PDN Input Power down & reset.
Port NamePin No. Input/Output
Function
In this unit,LOUT 3minal with asterisk mark (*) is (open) terminal which is not connected to the outside.

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