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MCU_RSTb IN
External Reset (active low) with on-chip pull-up. When this pin is asserted low, the HDMI
controller is totally reset.
MCU_OP IN
HDMI Controller operation mode.
0: Normal mode
1: ICP (In Circuit Flash Programming) mode
MCU_XIN IN External Crystal Input, 18.432 Mhz
MCU_XOUT OUT Exter
nal Crystal Output, 18.432 Mhz.
P2[7:0] IN/OUT GPIO port 2 with programmable Open Drain capability.
HDMI Controller Pins
1
P1[4:0] IN/OUT GPIO port 1 or Keyboard Interrupt inputs with internal 20KΩ pull-up to VDD
P3[7:4, 1:0]
OD
IN/OUT
Open Drain I/O port 3. P3 shared with IIC.
P4[5, 1:0] IN/OUT GPIO port 4 or External Interrupt inputs
P7[1:0] IN/OUT Open Drain I/O port 7. P7[1:0] shared with Serial Port.
1. Customer shall follow the pre-de
ned I/O pins application which shown in reference circuit for the correct opera-
tion of this chip.
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AVDD PWR HDMI Receiver Analog Power (1.8V)
PVDD PWR HDMI Receiver PLL Analog Power (1.8V)
AVDD33 PWR HDMI Termination Power (3.3V)
AVDD18 PWR HDMI Transmitter Analog Power (1.8V)
PVDD18 PWR HDMI Transmitter PLL Analog Power (1.8V)
AVSS, PVSS GND Analog
Ground
VDDE PWR I/O Power (3.3V)
VSSE GND I/O Ground
VDD PWR Internal Logic Power (1.8V)
VSS GND Logic Ground
VDD_PLL GND Audio PLL Power (3.3V)
VSS_PLL GND Audio PLL Ground
MCU_VDD GND HDMI Controller Power (3.3V)
NOTES:
Power Pins
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