53
LC-30HV4U
LC-30HV4D
» Pin mapping
Pin No. Pin Name Type Description
1 IN2-H I IN2-H: Independent H periodic signal input
2 IN2-V I IN2-V: Independent V periodic signal input
3 IN2-1 I IN2 system signal input
4 IN2-2 I
5 IN2-3 I
6 Vcc-MAT –– Power supply to selector or synchronous processing modules
7 IN3-H I IN3-H: Independent H periodic signal input
8 IN3-V I IN3-V: Independent V periodic signal input
9 IN3-1 I IN3 system signal input
10 IN3-2 I
11 IN3-3 I
12 GND-MAT –– GND for selector or synchronous processing modules
13 IN4-H I IN4-H: Independent H periodic signal input
14 IN4-V I IN4-V: Independent V periodic signal input
15 IN4-1 I IN4 system signal input
16 IN4-2 I
17 IN4-3 I
18 V-PH Connected to capacitor for holding Vsync peak
19 IN5-H I IN5-H: Independent H periodic signal input
20 IN5-V I IN5-V: Independent V periodic signal input
21 IN5-1 I IN5 system signal input
22 IN5-2 I
23 IN5-3 I
24 H-PH Connected to capacitor for holding Hsync peak
25 YG-OUT O Output of composite video signal for synchronous separation
26 YG-IN I Input of composite video signal for synchronous separation
27 IREF-SYNC Pin for reference current setting (approx. 4.6V)
28 VS-OUT O Output of HV of either IN1 system or IN2 - IN5 system selector signals. Signal is
29 HS-OUT O selected by I2C bus "YCBCR/MAT".
30 Vcc-OUT O Power supply to RGB system
31 SCP-IN I Sand-castle-pulse input
32 VTIM-IN I V timing pulse input
33 HP-IN I H pulse input
34 GND-OUT O GND for RGB system
35 R-OUT O RGB signal output.
37 G-OUT O When 100IRE white is inputted, signal is outputted at 2.6Vp-p.
39 B-OUT O
36 R-SH RGB AKB sample & hold
38 G-SH
40 B-SH
41 IK-IN I Input of returned reference pulse
42 PABL-FIL Peak ABL peak-hold
43 ABL-FIL Creates LPF when ABL control signal is received.
44 ABL-IN ABL control signal input
45 ABL-IN YM1/YS1 control signal input.
Input level is judged on the three-value logic.
This pin enables VM to turn off when YM or YS reaches its specified value.
46 LR1-IN I Analog RGB1 signal input
47 LG1-IN I
48 LB1-IN I
49 LB1-IN I YM2/YS2 control signal input.
Input level is judged on the three-value logic.
This pin enables VM to turn off when YM or YS reaches its specified value.
50 LR2-IN I Analog RGB2 signal input
51 LG2-IN I
52 LB2-IN I
53 ADDRESS I I2C bus slave address input
54 DPIC-C I Used to connect capacitor to GND pair for detection of dynamic picture
(black expansion)
55 SCL I I2C bus SCl (serial clock) input
56 SCL I I2C bus SDA (serial data) input
57 DPIC-MUTE I Used to provide mute control to dynamic picture (black expansion)
58 CLP-C Connected to Y system clamp capacitor
59 VM-OUT O VM output. Differential waveform of Y signal is outputted with positive polarity.
60
VM/SHP/COL-OFF Used to turn off VM, sharpness and color. Input level is judged on the three-value logic.
61 YCBCR-SW I Input for switching signal inputted to INT/EXT SW. External input pin is selected when
this input is High.
62 ECR-IN I External Y/Cb/Cr signal input
63 ECB-IN I
64 EY-IN I
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