Sharp LC-32GD8EE - Page 86

86
LC-26GA5E
LC-32GA5E
LC-32/37GD8E/RU
LC-32/37BT8E/RU
2.6. IC4001 (Sti5516)
2.6.1. Pinning
7368868E STMicroelectronics Confidential 27/709
STi5516 Pin list
Confidential
Note: 1 NC (not connected): indicates that the pin has no electrical connection, and may be used to route
power or signals on the PCB.
2 Do not connect: pin is reserved. It may have an electrical connection and must not be used.
14 15 16 17 18 19 20 21 22 23 24 25 26
EMIADDR
[5]
GND
VDDGEN
FSYN
NC CLK27MA
VDD18
VDD33
GND
Do not
connect
GND
GND
GND
GND
A
EMIADDR
[4]
GND
GNDGEN
FSYN
VDD
AUDIO
FSYN
VDD18
VDD33
GND
GND
VDD18
GND
GND
GND
NOT_P1284
STROBE
B
EMIADDR
[3]
VDDVPLL
CLK
SPEED
SEL
GND
AUDIO
FSYN
VDD18
VDD33
GND
GND
GND
GND
GND
P1284
BUSY
NOT_P1284
ACK
C
EMIADDR
[2]
GND
GND
AUXCLK
OUT
VDD18
VDD33
GND
GND
GND
GND
NOT_P1284
AUTOFD
P1284
SELECT
P1284
PERROR
D
VDD33
NOT_P1284
SELECTIN
NOT_P1284
INIT
NOT_P1284
FAULT
E
P1284
DATA[4]
P1284
DATA[5]
P1284
DATA[6]
P1284
DATA[7]
F
GND
P1284
DATA[1]
P1284
DATA[2]
P1284
DATA[3]
G
TSIN2L
DATA[5]
TSIN2L
DATA[6]
TSIN2L
DATA[7]
P1284
DATA[0]
H
VDD33
TSIN2L
DATA[3]
TSIN2L
PACKET
CLK
TSIN2L
DATA[4]
J
GND
TSIN2L
DATA[0]
TSIN2L
DATA[1]
TSIN2L
DATA[2]
K
GND
GND
GND
VDD18
TSIN2L
BYTE
CLK
TSIN2L
ERROR
TSIN2L
BYTE
CLKVALID
L
GND
GND
GND
TSIN1
DATA[4]
TSIN1
DATA[5]
TSIN1
DATA[6]
TSIN1
DATA[7]
M
GND
GND
GND
TSIN1
DATA[0]
TSIN1
DATA[1]
TSIN1
DATA[2]
TSIN1
DATA[3]
N
GND
GND
GND
TSIN1
BYTE
CLK
TSIN1
PACKET
CLK
TSIN1
ERROR
TSIN1
BYTE
CLKVALID
P
GND
GND
GND
VDD18
VDD18
VDD18
VDD18
R
GND
GND
GND
SMIMEM
CLKIN
SMIDATA
ML
SMIDATA
MU
NC
T
NOT_SMI
CAS
NOT_SMI
RAS
NOT_SMIWE
SMIMEM
CLKOUT
U
VDD33
SMIDATA
[15]
NOT_SMI
CS0
NOT_SMI
CS1
V
SMIDATA
[11]
SMIDATA
[12]
SMIDATA
[13]
SMIDATA
[14]
W
VDD33
SMIDATA
[8]
SMIDATA
[9]
SMIDATA
[10]
Y
GND
SMIDATA
[5]
SMIDATA
[6]
SMIDATA
[7]
A A
VDD33
SMIDATA
[2]
SMIDATA
[3]
SMIDATA
[4]
A B
GND
SPDIF
VDD18
PIO4[4]
VDD33
PIO5[3]
GND
VDD18
VDD33
SMIADDR
[12]
SMIADDR
[13]
SMIDATA
[0]
SMIDATA
[1]
A C
DO NOT
CONNECT
PIO3[5]
PIO4[1]
PIO4[5]
PIO5[1]
PIO5[4]
PIO5[7]
GND
VDD33
SMIADDR
[8]
SMIADDR
[9]
SMIADDR
[10]
SMIADDR
[11]
A D
PCM
DATA[1]
PIO3[7]
PIO4[2]
PIO4[7]
PIO5[2]
PIO5[5]
NOT_
HSYNC
GND
VDD33
SMIADDR
[4]
SMIADDR
[5]
SMIADDR
[6]
SMIADDR
[7]
A
E
DO NOT
CONNECT
PIO4[0]
PIO4[3]
PIO5[0]
PIO4[6]
PIO5[6]
EVENNOT
ODD
GND
VDD33
SMIADDR
[0]
SMIADDR
[1]
SMIADDR
[2]
SMIADDR
[3]
A
F
Pin list STi5516 26/709 STMicroelectronics Confidential 7368868E
Confidential
4 Pin list 4.1 Pin-out
The following pages give the allocation of pins to the package, shown from the top looking down.
1 2 3 4 5 6 7 8 9 10 11 12 13
A
EMI
SDRAM
CLK
EMIFLASH
CLK
EMIDATA
[14]
EMIDATA
[13]
EMIDATA
[10]
EMIDATA
[7]
EMIDATA
[3]
EMIDATA
[0]
EMIADDR
[23]
EMIADDR
[19]
EMIADDR
[16]
EMIADDR
[13]
EMIADDR
[9]
B
VDD33
VDD33
EMIDATA
[15]
EMIDATA
[12]
EMIDATA
[9]
EMIDATA
[6]
EMIDATA
[2]
EMIADDR
[25]
EMIADDR
[22]
EMIADDR
[18]
EMIADDR
[15]
EMIADDR
[12]
EMIADDR
[8]
C
VDD33
VDD33
VDD33
EMIDATA
[11]
EMIDATA
[8]
EMIDATA
[5]
EMIDATA
[1]
EMIADDR
[24]
EMIADDR
[21]
EMIADDR
[17]
EMIADDR
[14]
EMIADDR
[11]
EMIADDR
[7]
D
VDD33
VDD33
VDD33
VDD33
VDD33
EMIDATA
[4]
GND
VDD33
EMIADDR
[20]
VDD18
VDD33
EMIADDR
[10]
EMIADDR
[6]
E
GND
GND
GND
VDD33
F
GND
GND
GND
VDD33
G
VDD18
VDD18
VDD18
GND
H
NOT_EMI
ACKREQ
NC
EMIBOOT MODE[0]
VDD18
J
NOT_EMI
CAS
NOT_EMI
RAS
NOT_EMI
REQGNT
VDD33
K
NOT_EMI
CSD
NOT_EMI
CSC
NOT_EMI
CSB
NOT_EMI
CSA
L
NOT_EMIBE
[1]
NOT_EMIBE
[0]
NOT_EMI
CSF
NOT_EMI
CSE
GND
GND
GND
M
NOT_EMIOE
VDD33
VDD33
VDD33
GND
GND
GND
N
VDD33
EMIRD
NOTWR
NOT_EMI
LBA
EMIWAIT
NOT
TREADY
GND
GND
GND
P
DCU
TRIGGER
IN
VDD18
VDD18
VDD18
GND
GND
GND
R
VDD18
VDD18
DCU
TRIGGER
OUT
VDD18
GND
GND
GND
T
INTER
RUPT[3]
INTER
RUPT[2]
INTER
RUPT[1]
INTER
RUPT[0]
GND
GND
GND
U
PIO0[1]
PIO0[0]
PIO0[2]
VDD33
V
PIO0[6]
PIO0[5]
PIO0[4]
PIO0[3]
W
PIO1[2]
PIO1[1]
PIO1[0]
PIO0[7]
Y
PIO1[5]
PIO1[4]
PIO1[3]
GND
A A
VSSAA
DAC
VDDAA
DAC
VDDASA
DAC
PIO1[6]
A B
OUTM
LEFT
VCCAA
DAC
GNDAA
DAC
OUTM
RIGHT
A C
VCCASA
DAC
IREF
OUTP
LEFT
OUTP
RIGHT
GND
VDD33
TDI LPCLKIN
SHIELDV
DAC
GNDVDAC
YCC
VREFDAC
RGB
GNDVDAC
RGB
VDD18
A D
VBGFIL
PIO2[1]
PIO2[5]
PIO2[7]
PIO3[6]
PIO3[4]
TMS
LPCLK
OSC
VREFDAC
YCC
CVOUT
IREFDAC
RGB
BOUT
SCLK
A
E
PIO1[7]
PIO2[2]
PIO2[6]
PIO3[1]
PIO3[0]
NOT_TRST
NOT_RESET
RTCVDD
IREFDAC
YCC
YOUT
GOUT
VDDVDAC
RGB
PCMCLK
A
F
PIO2[0]
PIO2[3]
PIO2[4]
PIO3[3]
PIO3[2]
TDO
TCK
NOT_WDOG
RSTOUT
COUT
VDDVDAC
YCC
ROUT NC
LRCLK