Sharp LC65LE541U - Page 81

5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
min 100 usec
I2CMS: I2C Master/Slave Strap;
HIGH (Internal PU) - I2C Slave.
LOW (External PD) - I2C Master.
REF: Clock Reference Strap;
HIGH (Internal PU) - DCLK.
LOW (External PD) - CLKIN/XTALI.
Place 0.1 uF close to pins 6, 16, 23, 29, 12.
STRAPS
External I2C controller for tuning:
* Unmount RW7 and RW8.
* If a weak pull-up on I2C is needed, mount RW4 and RW5.
* I2C controller connections:
- I2C SCL to TP9.
- I2C SDA to TP8.
min 5 msec
NPCA110DAudioDSP
Generic I/O
3.3V Power
Reference Clock
(DCLK / Crystal)
Reset#
Power-Up Sequence
AMP CONTROL
DAMP I2S
I2C
I2S_SDIN
I2S_DIN
DSP_SDA
GPO18/SDO2/I2CMS
AMP_I2S_RESET
GPO07/SDO1/REF
GPO06/SDO0
I2S_SCL1
I2S_SDA1
GPO17
GPIO01/SYNC
CLKIN/XTALI
GPIO03/SDI1
GPIO04/SDI2
GPIO00/DCLK
GPIO14
GPIO20
GPIO03/SDI1
GPIO04/SDI2
GPO18/SDO2/I2CMS
GPO07/SDO1/REF
DSP_SCL
GPO07/SDO1/REF
GPIO14
GPIO20
GPO17
I2S_OUT_BCK
I2S_OUT_WS
I2S_OUT_MCK
WV_RESET
DSP_SCL
DSP_SDA
AMP_I2S_RESET
WV_RESET
I2S_SDA1
I2S_SCL1
I2S_DIN
I2S_OUT_BCK
I2S_OUT_WS
I2S_OUT_MCK
I2S_SDIN
+3.3V
GND
GND
+3.3V
+3.3V
GND
+3.3V
+3.3V
+3.3V
AMP_I2S_RESET(4,12)
WV_RESET(4)
I2S_SDA1
(4,12)
I2S_SCL1
(4,12)
I2S_OUT_SD
(4)
I2S_OUT_WS
(4,12)
I2S_OUT_BCK
(4,12)
I2S_OUT_MCK
(4,12)
I2S_SDIN(12)
RW14 1K
RA83
NC
TP9
RW10 33
JA2
NC
1
2
3
CW8
0.1uF/16V
RW18 0
RW12NC
M
RW16 0
RA90
NC
RW13NC
M
CW5
0.1uF/16V
+
CWE1
100uF/16V
RW7 0
RW5
NC
CW3
0.1uF/16V
TP1
TP3
TP5
RW2 33
CW6
4.7uF/6.3V
0603C
UW1
NPCA110DA0YX
GPIO02/SDI0
1
GPIO03/SDI1
2
GPIO04/SDI2
3
GPIO14
4
GPO18/SDO2/I2CMS
5
VDD33_1
6
GND_1
7
DAC_LOUT2
8
GPIO20
17
CLKIN/XTALI
18
XTALO
19
VPLL18
20
GND_PLL
21
VDD18
22
VDD33_3
23
nRESET
24
SDA
25
SCL
26
GPO17
27
GPIO00/DCLK
28
VDD33_4
29
GPIO01/SYNC
30
GP06/SDO0/nTEST
31
GPO07/SDO1/CLKOUT/REF
32
DAC_REF
9
VCM
10
AGND
11
AVDD
12
DAC_LOUTPUT
13
DAC_ROUTPUT1
14
GND_2
15
VDD33_2
16
GND_BP
33
TP7
CW1
0.1uF/16V
RW17 0
RW8 0
RW4
NC
CW7
4.7uF/6.3V
0603C
RW11
NC
CW4
0.1uF/16V
TP8
TP4
TP6
RW9 NC
CW2
0.1uF/16V
CW9
NC