Sharp MZ-80B - Page 120

113
Do
19
15
Ao
01
0 2
20
14
I
13
A1
A2
CPU
0 3
~--
12
A3
DATA
BUS
o.
Ds
0 6
39
10
38
9
3
8
A4
As
PORT A
1/ 0
A6
0 7
2
7
A7
PORT B/ A SEL
6
18
A ROY
CONTROL / DATA SEL
5
Z80A·PIO
16
A STB
PIO
CHIP ENABLE
CONTROL
Ml
4
27
37
28
8 o
81
IORQ
36
29
8 2
RD
35
30
8 3
31
8 4
+ 5V
GND
26
32
33
II
34
8 5
PORT B
1/ 0
8 6
8 7
<I>
25
21
B RDY
INT
INTERRUPT {
CONTROL
INT ENABLE IN
INT ENABLE OUT
17
23
24
22
B STB
FIGURE 3.0 -1
PIO
PIN CONFIGURATION