Siemens 7SR242 - Figure 4-1 Sequence Diagram Showing PU;DO Timers in Quick Logic (Counter Reset Mode Off)

7SR242 Duobias Description Of Operation
©2010 Siemens Protection Devices Limited Chapter 1 Page 43 of 52
P.
U. DE
LA
Y
D.O. DELAY
Figure 4-1 Sequence Diagram showing PU/DO Timers in Quick Logic (Counter Reset Mode Off)
When the count value = En Counter Target the output of the counter (En) = 1 and this value is held until the
initiating conditions are removed when En is instantaneously reset.
The output of En is assigned in the OUTPUT CONFIG>OUTPUT MATRIX menu where it can be programmed to
any binary output (O), LED (L) or Virtual Input/Output (V) combination.
Protection functions can be used in Quick Logic by mapping them to a Virtual Input / Output.
Refer to Chapter 7 – Applications Guide for examples of Logic schemes.