Simpson 460 4 Series - Page 44

Theory of Operation
grated on the “up” slope during the first period; the reference
voltage is integrated on the “down” slope of the, second period.
The first period starts with a pulse initiated by the Sample &
Reset Oscillator which generates four pulses per second as shown
in (1) of the Basic Timing Diagram (Figure 5-5).
5.4.3 The pulse resets the Decade Counters to “zero” and the
trailing edge of the pulse initiates the first period T,. During
T,, the DC voltage Ein is sampled, and the Integrator generates
а ramp whose slope is proportional to the value of the input signal.
Also during T,, the Master Oscillator (2) produces pulses which
| | INTEGRATOR T
©
NEGATIVE b POSITIVE
REFER- REFER-
ENCE ENCE
VOLTAGE VOLTAGE
ANODE
DRIVERS
CONTROL
LOGIC
MASTER
OSCIL- LATCHES
LATOR
SAMPLE DIGIT
DECADE
RESET COUNTERS SELECT
OSCILLATOR CIRCUITS
Figure 5-4. A/D Converter Block Diagram
5-8