Sinclair ZX SPECTRUM+ - CPU Clock; Dynamic Memory Refresh; Memory Organisation

Sinclair ZX Spectrum Service Manual
Spectrum For Everyone https://spectrumforeveryone.com/
9
1.3.4 CPU Clock
Returning to the CPU clock mentioned earlier in this section, the ULA is able to inhibit this input bringing
the CPU to a temporary halt. This mechanism gives the ULA absolute priority, allowing it to access the
standard 16k RAM without interference from the CPU (see RAM description). Switching transistor TR3
ensures that the clock amplitude is +5V rather than some arbitrary TTL level. This is essential if the CPU is
to operate effectively while executing fast machine code programs of the `space invader` type.
1.3.5 Dynamic Memory Refresh
The CPU incorporates built-in dynamic RAM refresh circuitry. As part of the instruction OP code fetch cycle,
the CPU performs a memory request after first placing the refresh address on the lower eight bits of the
address bus. At the end of the cycle the address is incremented so that over 255 fetch cycles, each row of
the dynamic RAM is refreshed. This mechanism only applies to the optional 32k expansion RAM in the 48k
Spectrum. An alternative refresh method is adapted for the standard 16k RAM.
1.4 MEMORY ORGANISATION
In the standard 16k Spectrum there are 32k bytes of addressable memory equally divided between ROM
and RAM.
The lower 16k bytes of memory (addresses 0000 - 3FFF) are implemented in a single ROM (IC5) which
holds the monitor program. This program is a complex Z80 machine code program divided broadly into
three parts one each covering the input/output routines, the BASIC interpreter and expression handling.
Details of the program content, although outside the scope of this manual, are referred to as necessary.
The upper 16 bytes of memory (addresses 4000 - 7FFF) are implemented using eight 16k bit dynamic
RAMs (IC6-IC13). Approximately half of this space is available to the user for writing BASIC or machine
code programs, the remainder is used to hold the system variables including 6k bytes reserved for the
memory mapped display area.
In the 48k Spectrum an additional 32k bytes of RAM are provided (addresses 8000 - FFFF) which are
implemented using eight 32k bit dynamic RAMs (IC15-IC32). The RAM, providing extra memory space for
the user, is normally fitted during manufacture but may be added retrospectively using the RAM expander
kit. In addition to the RAMs, the kit includes the address multiplexer and read/write control ICs IC23-IC26.
Board space and the necessary discrete components are already provided on the board.