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7-12. IC PIN FUNCTION DESCRIPTION
• MAIN BOARD IC201 CXP84332-210Q (SYSTEM CONTROLLER)
Pin No. Pin Name I/O Function
1 to 3 — O Not used (open)
4 CH.F O
Motor drive signal (load chucking direction) output to the chucking motor drive (IC52)
“L” active *1
5 CH.R O
Motor drive signal (save direction) output to the chucking motor drive (IC52)
“L” active *1
6 LOAD2 I
Chucking end detect switch (SW11) input terminal
“L”: When completion of the disc chucking operation
7 LOAD1 I
Save end detect switch (SW12) input terminal
“L”: When completion of the disc chucking operation
8 SENS2 I Internal status signal (sense signal) input from the CXA1992BR (IC11)
9 LIM.SW I
Sled limit in detect switch (SW1) input terminal
“L”: When the optical pick-up is inner position
10 EE.INIT I Initialize signal input for the EEPROM “H”: format Fixed at “L” in this set
11 EE.CLK O Serial data transfer clock signal output terminal Not used (open)
12 EE.DATA I/O Two-way data bus with the EEPROM Not used (open)
13 to 19 — O Not used (open)
20 SINGLE I
Setting terminal for the single disc/multiple discs mode
“L”: single mode, “H”: multiple discs mode (fixed at “H”)
21 XRST O System reset signal output to the CXA1992BR (IC11) and CXD2530Q (IC101) “L”: reset
22 FOK I Focus OK signal input from the CXA1992BR (IC11) “L”: NG, “H”: OK
23 SENS I Internal status signal (sense signal) input from the CXD2530Q (IC101)
24 GFS I Guard frame sync signal input from the CXD2530Q (IC101) “L”: NG, “H”: OK
25 GRSRT O Reset signal output terminal “L”: reset Not used (open)
26 XQOK O Subcode Q OK pulse signal output terminal “L” active Not used (open)
27 SDTI I ESP status signal input terminal Not used (open)
28 XSOE O ESP status read enable signal output terminal “L” active Not used (open)
29 ESPXLT O ESP latch pulse signal output terminal “L” active Not used (open)
30 RST I
System reset signal input from the SONY bus interface (IC302) and reset signal generator (IC304)
“L”: reset
For several hundreds msec. after the power supply rises, “L” is input, then it changes to “H”
31 EXTAL I Main system clock input terminal (8 MHz)
32 XTAL O Main system clock output terminal (8 MHz)
33 VSS — Ground terminal
34 TX O Sub system clock output terminal Not used (open)
35 TEX I Sub system clock input terminal Not used (fixed at “L”)
36 AVSS — Ground terminal (for A/D converter)
37 AVREF I Reference voltage (+5V) input terminal (for A/D converter)
38 MCK I
Input of signal for the fine adjustment (linear position sensor adjustment; RV201) of elevator
position (A/D input)
39 EHS I Elevator height position detect input from the RV202 (elevator height sensor) (A/D input)
40 MODEL I Setting terminal for the destination (fixed at “L” in this set)
41 XRDE O D-RAM read enable signal output terminal “L” active Not used (open)
42 XWRE O D-RAM write enable signal output terminal “L” active Not used (open)
43 A.MUTE O Audio line muting on/off control signal output terminal “H”: muting on
44 EMP O Emphasis mode output to the D/A converter (IC601) “H”: emphasis on
45 ML O Fast speed dubbing control signal output to the D/A converter (IC601) “L”: fast speed
46 GRSCOR I Subcode sync (S0+S1) detection signal input terminal Not used (open)
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