59
HCD-DZ500F
Pin No. Pin Name I/O Description
172 NT — Not Used
173 DVDD18 — Power Supply (+1.8V)
174 EUR — Not Used
175 DVSS — Terminal Ground
176 LIMSW O LIMSW signal output to Optical pick-up
177 OCSW I SEN signal input from System Controller (IC509)/OCSW signal input
178 VCLK — Not Used
179 CKSW I CKSW signal input
180 IO3 — Not Used
181 TSDM O TSDM signal output to Motor driver (IC201)
182 DVDD3 — Power Supply (+3.3V)
183 MUTE O MUTE signal output to Motor driver (IC201)
184 MUTE123 O MUTE signal output to Motor driver (IC201)
185 REW O REV signal output to Motor driver (IC201)
186 FWD O FWD signal output to Motor driver (IC201)
187 MSW O Volume control signal output to Optical pick-up
188 DSEL O Select signal output
189 DAVCC — Power Supply (+3.3V)
190 VREF I Bandgap reference voltage (not used)
191 FS O Full scale adjustment (pull down)
192 YUV0 — Not Used
193 DVSS — Terminal Ground
194 YUV1 O Y signal output to VIDEO AMP (IC201)
195 DAVDD — Power Supply (+3.3V)
196 YUV2 O CHROMA signal output to VIDEO AMP (IC201)
197 DVSS — Terminal Ground
198 YUV3 O VIDEO signal output to VIDEO AMP (IC201)
199 DAVDD — Power Supply (+3.3V)
200 YUV4 O G signal output to VIDEO AMP (IC201)
201 DVSS — Terminal Ground
202 YUV5 O B signal output to VIDEO AMP (IC201)
203 YUV6 O R signal output to VIDEO AMP (IC201)
204 DVDD3 — Power Supply (+3.3V)
205 MIC/VSYNC — Not Used
206 VOICE/YUV7 — Not Used
207 KRMOB/HSYNC — Not Used
208 SMSCK — Not Used
209 SPDATA/SMSDI I Audio data of SPDIF input
210 SMSDO — Not Used
211 XSMCS — Not Used
212 DVDD3 — Power Supply (+3.3V)
213 ALRCK I Audio left/right channel clock
214 ABCK O Audio bit clock
215 ACLK I Audio DAC master clock
216 DVSS — Terminal Ground
217 ASDATA0 O Auio serial data
218 ASDATA1 O Auio serial data
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