EasyManua.ls Logo

Sony HCD-PZ1D - Page 75

Sony HCD-PZ1D
108 pages
Print Icon
To Next Page IconTo Next Page
To Next Page IconTo Next Page
To Previous Page IconTo Previous Page
To Previous Page IconTo Previous Page
Loading...
HCD-PZ1D
75
Pin No. Pin Name I/O Description
77 RAS# O Row address strobe signal output for the 64M SDRAM
78 BA0 O Bank address signal output for the 64M SDRAM
79 DVSS18 Ground
80 BA1 O Bank address signal output for the 64M SDRAM
81 to 83 RA10, RA0, RA1 O Address signal output for the 64M SDRAM
84 DVDD33 Power supply pin (+3.3 V)
85, 86 RA2, RA3 O Address signal output for the 64M SDRAM
87 IFBSY I Communication initialization request signal input from the system control
88 IFCS# O Communication initialization request acknowledge signal output for the system control
89 RX Not used in this set
90 DVDD18 Power supply pin (+1.8 V)
91 TX Not used in this set
92 XMAMUTE Not used in this set
93 SPDIF O SPDIF signal output
94 TSDM I Thermal shut down signal input from the coil/motor driver
95 DACVDDC Power supply pin (+3.3 V)
96 VREF I Band gap reference voltage input
97 FS I Full scale adjustment signal input
98 DACVSSC Ground
99 CVBS O Composite video signal output
100 DACVDDB Power supply pin (+3.3 V)
101 DACVDDA Power supply pin (+3.3 V)
102 SY/Y/G O Component video (Y) signal output
103 SC/CB/B O Component video (Pb/Cb) signal output
104 CR/R O Component video (Pr/Cr) signal output
105 AADVSS Ground
106 ADIN I Audio data input from the A/D converter (for USB)
107 MUTE123 O Not used in this set
108 LIMITSW I Not used in this set
109 AADVDD Power supply pin (+3.3 V)
110 APLLVDD Power supply pin (+3.3 V)
111 APLLCAP I External capacitor connecting pin
112 ADACVSS2 Ground
113 ADACVSS1 Ground
114 ACLK O Master clock signal output for the A/D converter and D/A converter
115 ABCK O Bit clock signal output for the A/D converter and D/A converter
116 MUTE123 O Mute signal output for the coil/motor driver (for focus/tracking coil and sled motor)
117 AVCM I Audio D/A converter reference voltage input
118 LIMITSW I Limit detection switch signal input
119 ALRCK O L/R sampling clock signal output for the A/D converter and D/A converter
120 ASDATA0 O Audio data output for the D/A converter
121 ADACVDD1 Power supply pin (+3.3 V)
122 ADACVDD2 Power supply pin (+3.3 V)
123 AVDD18_1 Power supply pin (+1.8 V)
124 AGND18 Ground
125 RFIP I AC coupled RF signal input from the optical pick-up block
126 OPOUT O AC coupled RF signal output for the optical pick-up block
127 IOPMON I Power monitor pin
128 SPFG I Spindle motor hall sensor input from the motor driver

Table of Contents

Related product manuals