ST STM32F407 Series

October 2018 AN4488 Rev 7 1/50
AN4488
Application note
Getting started with STM32F4xxxx MCU hardware development
Introduction
This application note is intended for system designers who require an overview of the
hardware implementation of the development board, with focus on features like
• power supply
• package selection
• clock management
• reset control
• boot mode settings
• debug management.
This document shows how to use the high-density high-performance microcontrollers listed
in
Table 1, and describes the minimum hardware resources required to develop an
application based on those products.
Detailed reference design schematics are also contained in this document, together with
descriptions of the main components, interfaces and modes.
Table 1. Applicable products
Type Part numbers and Product lines
Microcontrollers
STM32F401xB / STM32F401xC
STM32F401xD / STM32F401xE
STM32F405/415 line
STM32F407/417 line
STM32F410x8 / STM32F410xB
STM32F411xC / STM32F411xE
STM32F412xE / STM32F412xG
STM32F413/423 line
STM32F427/437 line
STM32F429/439 line
STM32F446 line
STM32F469/479 line
www.st.com

ST STM32F407 Series Specifications

General

Brand	ST
Model	STM32F407 Series
Category	Motherboard
Language	English

Summary

Power Supplies

Voltage Regulator Modes

Explains the voltage regulator operation in Run, Stop, and Standby modes.

Power Supply Schemes

Describes the VDD, VBAT, VDDA, and VREF+ power supply connections and decoupling.

Analog Supply

Focuses on the ADC's independent power supply and VREF+ connection.

Reset and Power Supply Supervisor

Power Supply Supervisor

Covers PDR_ON, POR/PDR, and PVD features for power supply monitoring.

Power-OnPower-Down Reset

Describes the integrated POR/PDR circuitry and its operation.

Programmable Voltage Detector (PVD)

Explains how to use PVD to monitor VDD and generate interrupts.

Package Selection and Features

Alternate Functions

Explains how MCU pins can be configured for multiple functions.

Boot Mode Selection

Describes the three boot modes (Flash, System Memory, SRAM) and BOOT pin configuration.

Embedded Bootloader Mode

Information on the embedded bootloader and supported communication peripherals.

Debug Management

SWJ Debug Port (Serial Wire and JTAG)

Details the SWJ-DP, its JTAG and SW interfaces, and pin multiplexing.

Internal Pull-upPull-down Resistors

Explains embedded resistors on JTAG input pins to avoid floating levels.

Clocks Configuration

HSE Oscillator Clock

Details the HSE clock generation using external sources or crystal/ceramic resonators.

Reference Design Schematic

PCB Routing Guidelines

High-Speed Signal Layout

Package Layout Recommendations