ST UC2842B - Page 11

D95IN353
+
-
+
R
A
1
7
f =
R
BIAS
OSC
C
6
V
REF
RR
B
+
-
+
-
EA
R
2R
R
S
Q
84
5
2
3
5K
5K
5K
NE555
8
4
2
1
5
TO ADDITIONAL
UCX84XAs
1.44
(R
A
+ 2R
B
)C
D
max
=
R
B
R
A
+ 2R
B
Figure 23: External Duty Cycle Clamp and Multi Unit Synchronization.
D95IN352
+
-
EA
+
R
2R
5
R
T
1
2
EXTERNAL
SYNC INPUT
The diode clamp is required if the Sync amplitude is large enough to cause
the bottom side of C
T
to go more than 300mV below ground
R
BIAS
OSC
C
T
0.01µF
47Ω
4
8
V
REF
R
Figure 22: External Clock Synchronization.
UC2842B/3B/4B/5B - UC3842B/3B/4B/5B
11/15