Chapter 6: BIOS
73
LLC Prefetch
If this feature is set to Enable, LLC (hardware cache) prefetching on all threads will be
supported. The options are Disable and Enable.
Extended APIC (Extended Advanced Programmable Interrupt Controller)
Based on the Intel Hyper-Threading technology, each logical processor (thread) is assigned
256 APIC IDs (APIDs) in 8-bit bandwidth. When this feature is set to Enable, the APIC ID
will be expanded from 8 bits to 16 bits to provide 512 APIDs to each thread to enhance CPU
performance. The options are Disable and Enable.
AES-NI
Select Enable to use the Intel Advanced Encryption Standard (AES) New Instructions (NI) to
ensure data security. The options are Enable and Disable.
Advanced Power Management Conguration
CPU P State Control
SpeedStep (PStates)
processor voltage and core frequency in an effort to reduce power consumption and heat
dissipation. Please refer to Intel’s website for detailed information. The options are Disable
and Enable.
EIST PSD Function (Available when SpeedStep is set to Enable)
the voltage and frequency of the processor will be reduced when it is in operation. This
are HW_ALL, SW_ALL and SW-ANY.
Turbo Mode (Available when SpeedStep is set to Enable)
manufacturer. The options are Disable and Enable.
Hardware PM (Power Management) State Control
Hardware P-States
If this feature is set to Disable, hardware will choose a P-state setting for the system based
on an OS request. If this feature is set to Native Mode, hardware will choose a P-state
setting based on OS guidance. If this feature is set to Native Mode with No Legacy Support,
the BIOS will choose a P-state setting independently without OS guidance. The options
are Disable, Native Mode, Out of Band Mode, and Native Mode with No Legacy Support.
To Next Page
Loading...
