Supermicro SuperServer 6029P-WTR - Motherboard Layout

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13
Chapter 1: Introduction
Figure 1-4. Motherboard Layout
1.5 Motherboard Layout
Below is a layout of the X11DDW-L with jumper, connector and LED locations shown. See
the table on the following page for descriptions. For detailed descriptions, pinout information
and jumper settings, refer to Chapter 4.
JBMC_DEBUG
SRW1
JSDCARD1
JM2_1
JUIDB1
JP3
FAN5FAN6
FAN4
FAN3
FAN2
FAN1
JBT1
LE3
LE1
C
A
LEDM1
LE2
JNVI2C1
JIPMB1
JNVI2C2
JPME2
JPME1
JPL1
JPG1
S-SGPIO2
BT1
+
JSTBY1
JD1
1
JVRM1JVRM2
JL1
JP2
JF1
JPWR1
JPWR2
JPI2C1
JPWR3
JTPM1
JRK1
JSXB1_2
JAOM
JSXB1_1
JSXB1_3
BAR CODE
X11DDW-L
REV:1.02
MAC CODE
DESIGNED IN USA
BIOS LICENSE
I-SATA 4~7
I-SATA 0~3
S-SATA 0~3
P1_NVME1
P1_NVME0
P2_NVME1
P2_NVME0
CPU2_PORT2ACPU2_PORT2BCPU2_PORT2CCPU2_PORT2DCPU1_PORT3CCPU1_PORT3DCPU1_PORT3CCPU1_PORT3D
CPU1_PORT3BCPU1_PORT3ACPU1_PORT3BCPU1_PORT3A
SXB1B:CPU1 PCI-E 3.0 X16 + CPU2 PCI-E 3.0 X16
CPU2_PORT3
SXB2:CPU2 PCI-E 3.0 X16
USB4/5(3.0)
USB0/1(3.0)
USB2/3
(3.0)
S-SATA5
S-SATA4
VGA
LAN1
LAN2
X NMIPWR
LED
NIC HDD
LED
NIC
2 1
UID
LED
PS
FAIL
PWRRST
ON
IPMI_LAN
F1
P1 DIMM
E1 D1
CPU1
JWD1
JBR1
CPU1
P1 DIMM
B1
A1 C1
A1
P2 DIMM
B1 C1
CPU2
F1
P2 DIMM
E1 D1
CPU2
C620
10G PHY
BMC
VGA
JPG1
CPU1+CPU2 PCI-E 3.0 X16
SRW1
JPWR2
JSTBY1
USB4/5
BT1
JBT1
JL1
FAN6
LE3
S-SATA0~3
JM2_1
JTPM1
FAN5
FAN4 FAN3 FAN2 FAN1
JPWR1
JPWR3
LEDM1
S-SATA5
S-SATA4
JPI2C1
JPL1
JIPMB1
JWD1
JF1
LE2
JD1
JVRM2
IPMI LAN
USB0/1
USB2/3`
LAN1
LAN2
JRK1
JPME2
JPME1
LE1
JUIDB1
JNVI2C2
P2_NVME1 (-NT) P2_NVME0 (-NT)
P1_NVME0 (-NT)
JSDCARD1
P1_NVME1 (-NT)
T-SGPIO1
JVRM1
JBMC DEBUG
JNVI2C2
CPU2 PCI-E 3.0 X16
I-SATA0~3
I-SATA4~7
JP3
JP2
JSXB1_1
JSXB1_3
CPU1CPU2