Supermicro X12DPi-N6 - Page 99

Chapter 4: UEFI BIOS
99
CPU1 SLOT1/CPU1 SLOT2/CPU1 SLOT3/CPU1 SLOT4
CPU2 SLOT4/CPU2 SLOT5/CPU2 SLOT6
Intel® LAN1/Intel® LAN2
M.2
P1 NVME 0/1/P1 NVME 2/3
Link Speed
Use this feature to congure the link speed of a PCIe device installed in Port 0 or DMI port.
The options are Auto, Gen 1 (Generation 1) (2.5 GT/s), Gen 2 (Generation 2) (5 GT/s),
Gen 3 (Generation 3) (8 GT/s), and Gen 4 (Generation 3) (16 GT/s).
The following information will be displayed:
• PCIe Port Link Status
• PCIe Port Link Max
• PCIe Port Link Speed
Data Link Feature Exchange
Use this feature to enable/disable the PCIe port to enter PCIe 4.0 DL_Feature negotiation
state. The options are Disable and Enable.
PCIe Port Max (Maximum) Payload Size
Use this feature to set the maximum payload size in the PCIe Device Capabilities Register
for the device installed in the DMI port. The options are Auto, 128B, 256B and 512B.
Link Re-Train
Select Enabled for PCIe Link Re-training support, which will increase PCIe support
capability and efciency. The options are Disabled and Enable.
MCTP (Available when supported by the motherboard)
Select Yes to support Management Component Transport Protocol (MCTP) to improve
communications between different "smart" hardware components within the same platform
for system performance enhancement. The options are Yes and No.