Supermicro X12SPZ-SPLN6F - Page 17

17
Chapter 1: Introduction
Note 1: This is a general block diagram and may not exactly represent the features
on your motherboard. See the previous pages for the actual specications of your
motherboard.
Figure 1-3.
System Block Diagram
Debug Card
TPM HEADER
DIMMH1
PCI-E X16-Gen4
JPCIE6
DMI3
DIMME1
DIMMF1
JPCIE4
PE1[0:15]
PCH
LBG-1G--C621A
CPU#1
7+1 PHASE
270W
VR13HC
PVCCIN_CPU1
DIMMD1
DIMMA1
DIMMB1
DDR4-3200
DIMMC1
LRDIMM 3DS
DIMMG1
DDR4-3200
LRDIMM 3DS
Supports Barlow Pass
PCI-E X16-Gen4
PE2[0:15]
PCI-E X4-Gen4*2
PE3[0:3]
Slim SAS x8
PE0[8:15]
PCI-E X8-Gen3
BROADCOM
BCM57414
PCI-E X4-Gen3
Intel
I350-AM4
PE0[0:3]
ZSFP+
RJ45
25G *2
1G *4
MSR
MDI
NCSI
master
LAN3
RGRMII
PCI-E X1
USB 2.0
RTL8211F
eSPI
AST2600
BMC
COM 1
Header
DDR4
RJ45
VGA
CONN
USB 2.0 x 2
USB 3.0 x 2
USB 3.0 x 2
Internal
USB 3.0 x2
Box
PCIe[2]
SATA 3
SATA x2
Internal
SATA 3
M.2 -M key
PCIex4/SATA3
PCI-E X4-Gen3
PCIe[4:7]
sSATA[4:5]
sSATA[1]
USB3[1:2]
USB3[3:4]
USB2[11
:13]
USB2[10,12]
USB2[9]
USB 2.0 x 4
USB 2.0
Headerx2
Internal
USB2[1,4]
Rear I/O
Internal
NCSI
Rear I/O
Rear I/O
1G *1
Rear I/O
(w/ USB2.0)
BIOS
ROM
SPI
USB 3.0 x2
Conn.
Rear I/O
PI3EQX7742AIZHE
USB3.0 Re-driver
USB 2.0 x 2
USB 3.0 x 2
FAN 1-4
FAN A,B
Internal
PWM , TACH
RGB
CPLD
NOR Flash
TMP432
Temp Sensor
RT2
Temp Sensor
RT1
BMC
SPI
System
SPI
PCIE[12:15]
PE3[4:7]
CPLD-XO3(324 Pin)
OCuLink
SATA 3
PCI-E X4-Gen3
IPMI
ROM
CPLD
NAND Flash
SATA[0:3]
Supports Barlow Pass
PCI-E X4-Gen4*1
Slim SAS x4
PE3[8:11]
USB2[7]
onboard TPM
I/O Expander
SMBus
JGP1