Supermicro X12SPZ-SPLN6F - Page 87

Chapter 4: BIOS
87
PCI-E Port Max Payload Size
Selecting Auto for this feature will enable the motherboard to automatically detect
the maximum Transaction Layer Packet (TLP) size for the connected PCIe device,
allowing for maximum I/O e󰀩ciency. Selecting 128B or 256B will designate maxi-
mum packet size of 128 or 256. The options are 128B, 256B, 512B, and Auto.
CPU1 SLOT6 PCI-E 4.0 X16
CPU1 SLOT4 PCI-E 4.0 X16
Link Speed
Use this feature to select the link speed for the PCIe port. The options are Auto,
Gen 1 (2.5 GT/s), Gen 2 (5 GT/s), Gen 3 (8 GT/s), and Gen 4 (16 GT/s).
The following information will also be displayed:
• PCI-E Port Link Status
• PCI-E Port Link Max
• PCI-E Port Link Speed
PCI-E Port Max Payload Size
Selecting Auto for this feature will enable the motherboard to automatically detect
the maximum Transaction Layer Packet (TLP) size for the connected PCI-E de-
vice, allowing for maximum I/O e󰀩ciency. Selecting 128B or 256B will designate
maximum packet size of 128 or 256. The options are 128B, 256B, 512B, and Auto.
JSLIM1 NVMe0
JSLIM1 NVMe1
JSLIM2 NVMe2
Link Speed
Use this feature to select the link speed for the PCIe port. The options are Auto,
Gen 1 (2.5 GT/s), Gen 2 (5 GT/s), Gen 3 (8 GT/s), and Gen 4 (16 GT/s).
The following information will also be displayed:
• PCI-E Port Link Status
• PCI-E Port Link Max
• PCI-E Port Link Speed