TM8100 Mobile Radio Service Manual Circuit Descriptions 65
May 2004 © Tait Electronics Limited
Power Amplifier The power amplifier comprises the driver amplifier Q306 and two
paralleled final devices Q309 and Q310. The 24.5 dBm signal from the
broadband exciter is reduced by a band-dependent pi-attenuator and is
amplified by Q306. The resulting signal is then amplified a second time
by Q309 and Q310 to produce a typical output power of 42 W when
measured after the series capacitors at the start of the directional coupler
(C348, C349, C350). The high-level RF signal passes via the directional
coupler, the transmit-receive PIN switch, and the low pass filter, through
to the antenna. The low-pass filter is used to attenuate unwanted
harmonic frequencies.
Power Control Loop Calibration is used to adjust the power control loop, thus setting the
output of the transmitter to one of four preferred power levels (1, 5, 12
and 25 watts). The loop maintains these power settings under changing
environmental conditions. The control mechanism for this loop is via
the DAC IC204 and one of the operational amplifiers making up IC301.
The power control loop will be inhibited if for any reason an out-of-lock
signal is detected from the synthesizer. This ensures that no erroneous
signals are transmitted at any time. The power control loop senses the
forward power by means of the diode D304. This signal is fed to the
buffer and a band-limited operational amplifier back to the gate of Q306.
A voltage clamp (one of the operational amplifiers of IC301) for Q306
limits the maximum current that this device can draw.
Directional Coupler The directional coupler actively senses the forward power and feeds it
back to the power-control circuit. If the directional coupler detects too
much reverse power, indicating a badly matched antenna, the transmitter
will be reduced to the lowest power setting.
Temperature Sensor For added protection, a temperature sensor ensures that the transmitter
power is reduced to very low levels should a temperature threshold be
exceeded. If the temperature does not decrease, the transmitter is
switched off.
3.3 Receiver
Introduction The receiver circuitry is given on sheet 4 of the circuit diagram for the
main board. The receiver is of the triple-conversion superheterodyne
type. The first two IF stages are implemented in hardware; the third stage
is implemented in the FPGA (field-programmable gate array) of the
digital board. The FPGA also carries out the demodulation of the
received signals.
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