Pin
No.
Mark I/O /
Division
Function
29 P71/
TB1IN
I Tuner reception detect
input terminal
30 P70/
TB0IN
O Chip enable signal output
terminal to IC501
(LC72722PMTLM)
31 P47/
CST0
/RST0
O Chip enable signal output
terminal to IC102
(LC72131MDTLM)
32 P46/
CXL0
O Clock output terminal to
IC501 (LC72722PMTLM)
33 P45/
RXD0
I Stereo input terminal from
IC102 (LC72131MDTLM)
34 P44/
TXD0
O Data output terminal from
IC102 (LC72131MDTLM)
35 P43/
FLD51
I Tuner signal detection input
terminal from IC101
(LA1833MN-TLM)
36 P42/
FLD50
I Chip select input terminal
37
~
40
P41/
FLD49 /
~ / P36/
FLD46
I/O FL segment control in/
output terminal
41
~
54
P35/
FLD45
~
P20/
FLD32
O FL segment control output
terminal
55
~
62
P17/
FLD31
~
P10/
FLD24
63 VCC I Power supply terminal
64 P70/
FLD23
O FL segment control output
terminal
65 VSS — GND teminal
66
~
72
P06/
FLD22
~
P00/
FLD16
O FL segment control output
terminal
73 P57/
FLD15
O FL segment control output
terminal
14