Tektronix 2213 - Page 46

t he Sw p Ζ -Axis current al r eady pr esent from C R 622 to
intensify t he display . T h e non-intensified portion of t
he
trace i nd icates t he amount of total d elay time
.
D L
Y'D
. In t
h
is position
of
H O R IZO N TA L M OD E
switc
h
S650, t
h
e start of t
h
e sweep is d elayed b y t
h
e
amo u nt of time establis h e d by t he Delay circ u it . W h en
α
trigger signal cloc k s U 603 B to p rod u ce α ΗΙ
Sw
p Gate
signal on U 603 B pin 9, t he d elay time is started . T he ΗΙ is
ap plie d to t he base of Q624 via R613 to b ias t h at transistor
off . Tran sistor Q624 is u se d as α switc h across t h e d elay
timing capacitors . Wh en b iased on, t he transisto r k eeps t he
timing ca p acitors d isc h arge d . Wh en t h e transistor is biase d
off, t h e d elay timing ca p acitors are allowe d to c h arge . B ot h
t h e amount of capacita n ce a nd t he ch argi n g voltage are con-
trolled by D EL AY TIME switc h S660 . T h e D EL AY TIME
switc h also controls the voltage ra n ge a p p lied to MUL TI-
PL I ER potentiomter R 658 .
F or t h e longest delay-time range (0 .2 ms), S660 switc h es
C622 i n parallel wit h C624 . Wh en switc hed to t he 10- μ s
d elay positio n , C622 is out of t he delay timing circ u it .
F i n ally, i n t h e 0 .5- μ s p osition, a dd itio n al ch argi ng cu r re n t
is supplied to C664 via R 692 to i n crease t h e ch arging rate,
an d +8 .6 V is a p plied to t h e MUL TI PL I ER potentiometer
via R 600 . T h e i n crease d voltage ch a n ges t h e control r ange
availa b le at t h e wiper of R 658 .
At t
h
e start of
t he
d elay
time,
U 603 B pin 8 goes L 0 .
T h is removes t h e p ositive bias from
Q632, a
nd
t
h e
emitter
voltage of 0632 becomes near ground potential .
As
t h e
d elay timing ca p acitor
c
h arges, t he base of
0632
remains
at
α constant voltage, t h erefo r e t h e base of Q652 goes negative .
Wh en t he base of comparator transistor Q652 reac h es α
mo r e negative level
t
h
a n t
h
e b ase of com p arato r t r ansistor
Q644 (set by t h e MUL
TI PL I ER
co n trol),
Q652 starts to
switc h off an d Q644 sta r
ts
to switc h on
. T
he collector
voltage drop of Q644 is couple d back to t he emitter of
Q632 via R 641 to complete t h e switc h ing action .
T
he
collector voltage of Q652 rises to α ΗΙ logic level w h ic h
is applie d to Swee p L ogic Gate U 620 on p i n s 3 and 13 . T he
ΗΙ is A N De d with t he ΗΙ Swp Gate signal alrea dy p resent
to pr odu ce α L O ou t p ut at U
620
pin
6
an d pin
8 . T
h e
L O
at pi n 6 i n itiates α Swee p , and t he L O at p in
8
unblank
s
t h e crt .
In t h e D L Y'D M od e, p in 12 of U 607D
is LO, so
pin
11
will be ΗΙ to bias
C R 619
on an
d C R 621
off ( F
ig u re 3-6) .
T
h
is actio
n p revents
i
n
tensifying current from reac h i ng t h e
Ζ
-Drive line d u ring the D L Y'D Swee p dis p lay .
Duri n g Swee p retrace time, C R621 is b iase d off by t h e
ΗΙ applied to C R 668 from U 603 B p in 8 to keep t he crt
bla
nk
ed
off .
Auto Intensity
T h eory of Operatio n -2213 Se r vice
A UTO I N T EN SITY
A ND Z-AXIS A MPL I F I ER
T h e pu r p ose of t h e Auto I n te n sity ci r cuit, s h ow n in
Diagram 6, is to kee p t he intensity of t he t r ace on t he crt
at α consta n t level wit
h
c
h
a n gi ng sweep s p eeds an d trigger
sig
n
al
re p etition rates .
In
conventio n al oscilloscopes,
as
t he d uty cycle of t he d isplaye d trace ch anges, t he inte n sity
will vary . T he Auto Intensity circ u it com p ensates fo r t h is
effect by increasing t h e Ζ -Axis Drive voltage for low Sweep
du ty factors . T
h
e elements of t h e Auto Inte n sity circ u it
consist of fou r b loc k s : t he d uty-cycle ave r age r , the b oost-
factor converter, t
h
e i n te n sity-control m u ltiplier, and t he
crt triode com p e n satio n circ u it .
T
h e d u
ty-cycle ave
r
ager
consists of an electronic switc h ing circuit compose
d
of
U 825A, U 825 B , and U 825C . T he Swp Duty signal t h
at
is
a pp lie d to U 825 B p i n 11 causes t h e out pu t voltage at p i n
14 to b e switc he d between groun d an d +5 V . T he output
voltage of U 825 B is ave r age d b y R 821 a nd C821 an d
app lied to U 835A pi n 3 via U 825C .
As t he sweep d u ty factor d ec r eases, t he crt beam cur r ent
must b e i n crease d to maintai n α constant i n te n sity . To
accomplis h t he tas k , t he b oost-factor converter inc r eases
t h e d rive in inverse p ro p ortion to t he duty factor of t he
trace b eing d isplaye d .
Amplifier U 835A is α hig h-imped a n ce voltage followe r .
F or 100% ο du ty factor, t he outp u t voltage will be ap p roxi-
mately zero . Decreasing t he du ty factor to
10 ο /
ο res u lts in
a pp roximately 4 .5 V outp ut, and w hen no swee p occurs
( Οο / ο d u ty factor) t h e o u t p ut will be 5 V . T he outp ut of
U 835A is a pp lie d to α net w or k consisting of CR
828,
C R 830, a n d resistors R 827, R 828, R 829, R 830, and R 831 .
T
h
is
networ
k pro d
uces
an
ou
t pu t current w h ic h is α non-
linear fu
n ction of t h e
d uty-facto r voltage . F or 10 ο % ο d u ty
facto r , t h e ou t pu t cu rrent is 10 times greater t h
an
t h e
current at 100% d uty factor . M aximum available boost
limits at α facto r of a bo u t 25 :1 .
T h e nonlinear cu rrent is co
nn
ecte d to t
h
e emitters of
the d ifferential am p
lifier com p ose d of
Q811 an
d
Q812 .
T h
e
emitte
r s
of t
h e
two
amplifier
t
r ansisto r
s
are h eld
at α
constant voltage
by t he actio n of
Q813 . A U TO INTEN-
SITY
control R807 is connecte d to t he base of Q811 via
R 811 . It controls t h e portion of t h e boost cu rr ent t h at goes
to t he s u mmi ng j unction of U 835 B . Boost cu rre n t is p r o-
p ortional to t he true b eam current re q ui r e d at the face p late
of t he crt .
T h e c r t triode compensation circ u it is an inverti n g
o p erational am p lifier wit h nonlinear feedbac k . It is
com p ose d of U 835 B , R 834, R 835, C834, and C R 834 .
Output
voltage of t he circuit c han ges i n r es p o n se to t h e
3-1 9