Texas Instruments 990 - Refresh Memory Block Diagram

-
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0
FROM CRU
INTERFACE
LOGIC
FROM CHARACTER
SYNCH RON I ZATI ON
LOGIC
FROM CRU
INTERFACE
LOGIC
FROM TIME
BASE
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FROM CRU
INTERFACE
LOGIC
(B) 136287
CRBCQ
...
KAD,0-10
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CRA ,0-7 ,Q
CURSOR
ADDRESS
COMPARATOR
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l
CURSC>R
ADDRESS
REGIS1"ER
...
MEMOR:Y
CONTROLLER
CURL
TO VIDEO
OUTPUT LOGIC
i--
0.: 960 l
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CHAR
KAD,0-9
....
MEMORY ADDRESS
- MULTIPLEXER
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MEMORY
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MIDRC
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MID
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INPUT
..
....
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MDO ,0-7 ,Q
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..._____
TO CRU
RF
[
INTE ACE
LOGIC
Figure 1-37. Refresh Memory Block Diagram
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READ
DATA
LATCH
I TO VIDEO
OUTPUT
LOGIC