Texas Instruments 990 - Memory Read and Write Control Logic

FROM CRU
INTERFACE
LOGIC
RL
CUWRQ
FROM CRU {
INTERFACE
LOGIC
RL
(B) 13G269
NWORD1Q
NCR8P
NCR10P
CK
K
{
MAIO
FROM MEMORY
ADDRESSING LOGIC
NMA10
{
D2TRU6Q
FROM TIME
BASE GENERATOR
D2TRU5Q
p
WQ
Q
D
Q
CUWRQ
WRQ
1----------t D
LS109
LS 174
LS273
Q
DOTR6
CK
CLK
----·-'CK
CL
Cl..
CL
CUWRQ
WRITE DATA
STROBE LATCH FROM _N_R_L _ _.,------+----·~---'
CRU
CURSOR
WRITE
LATCH
CUWRQ
RQ
Q
INTERFACE LOGIC
WRITE DATA
STROBE
SYNCHRONIZER
RDQ
FROM TIME DOTR 1
BASE GENERATOR _..;...;._;_;_ ___ l----1
CUWRQ
DOTR6
CURDQ
D
Q
l------+-----1D Q 1-----•
LS109
LS 174
LS273
CK
CLK
i<
DOTR6
CK
Q
'------'CK
CL
CL
CL
READ
REQUEST
FROM CRU
NRL
LATCH
INTERFACE
LOGIC
CURDQ
Figure 1-39. Memory Read and Write Control Logic
NMAHI
NM ALO
A
'------tB LS 1 39
Y3
MIDRC
TO REFRESH
MEMORY DATA
PATH