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Texas Instruments M-LVDS User Manual

Texas Instruments M-LVDS
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PCB Construction
3-8
Bill of Materials, Board Layout, and PCB Construction
Table 32 shows the layer stack up of the EVM with the defined trace widths
for the controlled impedance etch runs using microstrip construction.
Table 32.EVM Layer Stack Up
Differential Model Single-Ended Model
Material
Type:
FR 406
Layer
No.
Layer
Type
Thickness
(mils)
Copper
Weight
Line
Width
(mils)
Spacing
(mils)
Impedance
()
Line
Width
(mils)
Impedance
()
1 Signal 0.0006 0.5 oz (start) 0.027 0.230 100 0.0420 50
PREPREG 0.025
2 Plane 0.0012 1
CORE 0.004
3 Plane 0.0012 1
PREPREG 0.025
4 Signal 0.0006 0.5 oz (start) 0.027 0.230 100 0.0420 50

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Texas Instruments M-LVDS Specifications

General IconGeneral
BrandTexas Instruments
ModelM-LVDS
CategoryMotherboard
LanguageEnglish

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