Toshiba Satellite A50S Series - Page 24

1 Hardware Overview 1.2 System Block Diagram
1-8 [CONFIDENTIAL] Satellite A50S/TECRA A3X Maintenance Manual (960-534)
 Chipset
This gate array has the following elements and functions.
¾ North Bridge (Intel 915GM <Express Chipset>)
- Support Pentium-M(915GM)/Celeron-M(915GM/910GML) Processor
System Bus
- System Memory Interface
- Memory Controller : DDR333/DDR2-400/DDR2-533, 2GB(max)
- Graphics I/F : x16 PCI Express Based Graphics I/F
- DMI (Direct Media Interface)
- Integrated Display interface
- 1,257-ball 40.0mmx37.5mmx2.6mm FC-BGA Package
¾ South Bridge (Intel 82801DBM (ICH6-M))
- DMI (Direct Media Interface)
- PCI Express I/F (4 ports)
- PCI Bus I/F Rev 2.3 (PCI REQ/GNT Pairs)
- Integrated Serial ATA Host Controller (2 ports, 150MB/S)
- Integrated IDE Controller (Ultra ATA 100/66/33)
- AC’97 2.3 codes
- USB 1.1/2.0 Controller 8 ports (EHCI: Enhanced Host Controller
Interface)
- Built-in LAN Controller (Wfm 2.0& IEEE802.3 compliance)
- Power Management (ACPI 2.0 compliance)
- SMBus2.0 controller
- FWH interface (BIOS)
- LPC interface (EC/KBC, Super I/O)
- IRQ controller
- Serial Interrupt Function
- Suspend/Resume control
- Built-in RTC
- GPIO
- 609-ball 31mmx31mm micro BGA Package
 PC card controller (Texas Instruments PCI7411)
- PCI Interface (PCI Rev. 2.3)
- PC Card Controller
- IEEE1394 Controller
- Flash Media Controller
- SD Host Controller