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TYAN TIGER 230 - 3.5 Integrated Peripherals

TYAN TIGER 230
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Tiger 230 S2507
33
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3.5 Integrated Peripherals
This section describes settings for the integrated peripherals setup options.
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PCI Delay Transaction
PCI Master 0 WS Write
Sets whether writes to PCI bus are executed with zero wait
states. [Default settings are Enabled]
Sets write buffer support in compliance with PCi spec v2.1.
[Default setting is Enabled]
Memory Parity / ECC Check
Sets whether the BIOS should enable memory checking auto-
matically when it detects ECC DRAM. [Default is Disabled]
PCI#2 Access #1 Retry
Sets whether PCI masters should rotate priority [Default is Dis-
abled]
AGP Master 1 WS Write / Read
Sets whether one clock tick should be added to AGP write oper-
ations. [Default is Enabled]
IDE Prefetch Mode
On-Chip IDE Channel 0 / 1
Sets the onboard support for the two IDE channels. [Default set-
ting is Enabled]
IDE Pri/Sec Master/Slave PIO
Sets support for IDE prefetching for faster drive accesses.
[Default setting is Enabled]
Sets PIO mode for each of up to four IDE devices that the
onboard IDE interface supports. [Default is Auto]
IDE Pri/Sec Master/Slave UDMA
Sets whether UDMA data transfer protocol should transfer at
optimal speed, or to auto-detect optimal speed. [Default is Auto]
Init Display First
IDE HDD Block Mode
Sets type of display adapter installed. [Default is PCI Slot]
Sets onboard detection of optimal number of block R/W’s per
sector that the drive can support. [Default is Enabled]
Sets whether onboard floppy controller should be used. [Default
is Enabled]
Sets logical COM port address and corresponding interrupt for
1st and 2nd serial ports. IR is offered on 2nd port. [Default is
Auto]
Onboard FDD Controller
Onboard Serial Port 1 / 2
Sets operating mode for second serial port. [Default is Stan-
dard]
UART Mode Selecty
Sets whether COM port should be able to receive and transmit
data simultaneously. [Default is Half, as in Half-Duplex]
UART2 Duplex Mode
Reserved. [Default is No, Yes]
Tx,Rx Inverting Enabled
BIOS