Watson-Marlow MC100 - Process Status Bits from MC100

Users Manual
MC100
MC100 DeviceNet OM 1.01 EN.doc Version: 1.01 Page 17 of 36
7.1.2 Process status bits from MC100
Status bits cyclic process data
For MC100 status one word (2 bytes) is dedicated as scheduled below.
Word 0
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
B1.7 B1.6 B1.5 B1.4 B1.3 B1.2 B1.1 B1.0 B0.7 B0.6 B0.5 B0.4 B0.3 B0.2 B0.1 B0.0
B0.0-4 Active pump number
B0.4-7 Reserved for future use
B1.0 Mode status bit 0
B1.1 Mode status bit 1
MC100 mode status: Mode status bit 0 Mode status bit 1
Individuel “1” “0”
Parallel “0” “1”
Seriel “1” “1”
B1.2-3 Reserved for future use
B1.4 Ready to receive acyclic ADI parameters (explicit messages)
B1.5 Parameter error – is reset when new parameter is accepted.
B1.6 Ready
B1.7 Alarm
Note B1.4 in the MC100 control bits is used as a READY- /BUSY bit for explicit parameter
transfers, the bit will go low when accepting an explicit parameter transfer and will go high
again when the data is processed, thereby enabling a new transfer, this handshake
mechanism MUST be respected otherwise data will be lost.