Alto
Hardware Manual
Section 1: Introduction
2
1.1
Guide
to
this Document
This document
is
a comprehensive description of
the
Alto. Information about hardware, microcode, and
CPU
programming
is
sprinkled throughout. Programmers interested primarily in the
CPU
emulator should
concentrate on the sections labeled with an asterisk in the table
of
contents.
1.2
People
The Alto
was
originally designed by Charles
P.
Thacker and Edward M. McCreight and
was
based on
requirements and ideas contributed by Alan
Kay,
Butler Lampson
and
other members
of
PARC'S
Computer
Sciences
Laboratory and Systems
Sciences
Laboratory. Bob Metcalfe and David Boggs
designed the Ethernet;
Severo Ornstein and
Bob
Sproull designed the Orbit; Roger Bates designed the
Trident controller; David
Boggs
designed the tape controller; Tat Lam, Dick Lyon, Ed McCreight
and
Dan Swinehart designed the Audio Board; Larry Stewart designed
the
BBN-1822
interface.
The machine
was
re-engineered
as
the Alto II
for
ITG/SDD
to
a specification developed by John Ellenby.
The engineering and production were carried out
by
EOD Special Programs Group, managed
by
Doug
Stewart and coordinated on behalf
of
PARC
and
SDD
by John Ellenby.
The
members
of
EOD/SPG
who
worked on the project are Doug
Stewart, Ron Cude, Ron Freeman, Jim Leung, Tom Logan, Bob
Nishimura, Abbey Silverstone, Nathan Tobol, and
Ed
Wakida.
This hardware manual has had a long history of modification and extension and has benefited from
endless toil
by
numerous individuals. The original manual
was
written by Chuck Thacker and
Ed
McCreight. The last major revision
was
edited
by
Bob
Sproull and Diana Merry. The present document
is
the responsibility
of
Ed McCreight, David
Boggs,
and Ed Taft.
1.3
Conventions and Notation
Numbers
in
this document are decimal unless followed
by
"B";
thus
10
=
12B.
Bits
in registers are numbered from the most significant bit
(0)
toward the least significant bit. Fields
within registers are given
by
following the register name
with
a pair
of
numbers
in
brackets:
IR[a-b]
describes the
b-a+
1 bit field
of
the
IR
register beginning with bit a and ending with
bit
b inclusive. IR[a]ยท
is
short for
IR[a-a].
The
symbol"
t-"
is
used
to
mean "is replaced
by."
Thus
IR[4-5]
t-
2 means that the 2-bit field
of
IR
including bits 4 and 5
is
replaced by the bit values 1 and 0 respectively.
The
symbol"
="
is
used
as
an
equality test.
Memory
is
by
convention divided into 256-word "pages." Page n thus contains addresses
256*n
to
256*n
+
255
inclusive. The notation "rv(adr)"
is
used,
as
in
BCPL,
to denote "the contents
of
the memory
location with address
adr."