Xilinx ML605 User Manual

ML605 Hardware User Guide www.xilinx.com 89
UG534 (v1.2.1) January 21, 2010
NET "PMBUS_DATA_LS" LOC = "AB10"; ## 2 on Q17
##
NET "SFP_LOS" LOC = "V23"; ## 8 on P4
NET "SFP_RX_N" LOC = "E4"; ## 12 on P4
NET "SFP_RX_P" LOC = "E3"; ## 13 on P4
NET "SFP_TX_DISABLE_FPGA" LOC = "AP12"; ## 1 on Q22
NET "SFP_TX_N" LOC = "C4"; ## 19 on P4
NET "SFP_TX_P" LOC = "C3"; ## 18 on P4
##
NET "SGMIICLK_QO_N" LOC = "H5"; ## 2 on series C55 0.1uF
NET "SGMIICLK_QO_P" LOC = "H6"; ## 2 on series C56 0.1uF
NET "SGMII_RX_N" LOC = "B6"; ## 1 on series C163 0.01uF
NET "SGMII_RX_P" LOC = "B5"; ## 1 on series C162 0.01uF
NET "SGMII_TX_N" LOC = "A4"; ## 1 on series C164 0.01uF
NET "SGMII_TX_P" LOC = "A3"; ## 1 on series C165 0.01uF
##
NET "SMA_REFCLK_N" LOC = "F5"; ## 1 on series C61 0.1uF
NET "SMA_REFCLK_P" LOC = "F6"; ## 1 on series C62 0.1uF
NET "SMA_RX_N" LOC = "D6"; ## 1 on series C57 0.1uF
NET "SMA_RX_P" LOC = "D5"; ## 1 on series C58 0.1uF
NET "SMA_TX_N" LOC = "B2"; ## 1 on J27 SMA
NET "SMA_TX_P" LOC = "B1"; ## 1 on J26 SMA
##
NET "SM_FAN_PWM" LOC = "L10"; ## 1 on Q24
NET "SM_FAN_TACH" LOC = "M10"; ## 2 on R368
##
NET "SYSACE_CFGTDI" LOC = "AC8"; ## 81 on U19
NET "SYSACE_D0" LOC = "AM15"; ## 66 on U19
NET "SYSACE_D1" LOC = "AJ17"; ## 65 on U19
NET "SYSACE_D2" LOC = "AJ16"; ## 63 on U19
NET "SYSACE_D3" LOC = "AP16"; ## 62 on U19
NET "SYSACE_D4" LOC = "AG16"; ## 61 on U19
NET "SYSACE_D5" LOC = "AH15"; ## 60 on U19
NET "SYSACE_D6" LOC = "AF16"; ## 59 on U19
NET "SYSACE_D7" LOC = "AN15"; ## 58 on U19
NET "SYSACE_MPA00" LOC = "AC15"; ## 70 on U19
NET "SYSACE_MPA01" LOC = "AP15"; ## 69 on U19
NET "SYSACE_MPA02" LOC = "AG17"; ## 68 on U19
NET "SYSACE_MPA03" LOC = "AH17"; ## 67 on U19
NET "SYSACE_MPA04" LOC = "AG15"; ## 45 on U19
NET "SYSACE_MPA05" LOC = "AF15"; ## 44 on U19
NET "SYSACE_MPA06" LOC = "AK14"; ## 43 on U19
NET "SYSACE_MPBRDY" LOC = "AJ15"; ## 39 on U19
NET "SYSACE_MPCE" LOC = "AJ14"; ## 42 on U19
NET "SYSACE_MPIRQ" LOC = "L9"; ## 41 on U19
NET "SYSACE_MPOE" LOC = "AL15"; ## 77 on U19
NET "SYSACE_MPWE" LOC = "AL14"; ## 76 on U19
##
NET "SYSCLK_N" LOC = "H9"; ## 5 on U11, 5 on U89 (DNP)
NET "SYSCLK_P" LOC = "J9"; ## 4 on U11, 4 on U89 (DNP)
##
NET "USB_1_CTS" LOC = "T24"; ## 22 on U34
NET "USB_1_RTS" LOC = "T23"; ## 23 on U34
NET "USB_1_RX" LOC = "J25"; ## 24 on U34
NET "USB_1_TX" LOC = "J24"; ## 25 on U34
##
NET "USB_A0_LS" LOC = "Y32"; ## 14 on U30
NET "USB_A1_LS" LOC = "W26"; ## 2 on U29
NET "USB_CS_B_LS" LOC = "W27"; ## 18 on U29
NET "USB_D0_LS" LOC = "R33"; ## 8 on U31
NET "USB_D1_LS" LOC = "R34"; ## 14 on U31
NET "USB_D2_LS" LOC = "T30"; ## 6 on U31
NET "USB_D3_LS" LOC = "T31"; ## 16 on U31
NET "USB_D4_LS" LOC = "T29"; ## 4 on U31
NET "USB_D5_LS" LOC = "V28"; ## 18 on U31

Xilinx ML605 Specifications

General

Brand	Xilinx
Model	ML605
Category	Motherboard
Language	English