Xilinx Virtex-5 FPGA ML561 User Manual

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Virtex-5 FPGA ML561
Memory Interfaces
Development Board
User Guide
UG199 (v1.2.1) June 15, 2009

Xilinx Virtex-5 FPGA ML561 Specifications

General

Brand	Xilinx
Model	Virtex-5 FPGA ML561
Category	Motherboard
Language	English

Summary

Chapter 1: Introduction

About the Virtex-5 FPGA ML561 Memory Interfaces Tool Kit

Virtex-5 FPGA ML561 Memory Interfaces Development Board

Introduces the ML561 Development Board, the core of the tool kit.

Chapter 2: Getting Started

Initial Board Check Before Applying Power

Details pre-power checks for the development board configuration.

Applying Power to the Board

Step-by-step guide on how to safely power up the development board.

Chapter 3: Hardware Description

Hardware Overview

Provides an overview of the ML561 board's implementation and memory technologies.

Memory Details

Details the types and configurations of DDR2, DDR400, QDRII, and RLDRAM II memories.

External Interfaces

Power Regulation

Explains the power supply system and voltage regulators used on the board.

Chapter 4: Electrical Requirements

Power Consumption

Details power supply inputs, ratings, and total board power consumption.

FPGA Internal Power Budget

Chapter 5: Signal Integrity Recommendations

Termination and Transmission Line Summaries

Provides recommendations for signal termination schemes for memory interfaces.

Chapter 6: Configuration

Configuration Modes

Describes the available modes for configuring the Virtex-5 FPGAs.

JTAG Chain

JTAG Port

Parallel IV Cable Port

System ACE Interface

Chapter 7: ML561 Hardware-Simulation Correlation

Introduction

Test Setup

Details the hardware, software, and stimulus used for SI correlation.

Signal Integrity Correlation Results

Presents SI results from hardware measurements and simulations for various signals.

Summary and Recommendations

Summarizes correlation findings and extrapolated SI characteristics.