Xilinx Virtex-5 FPGA ML561 User Manual

32 www.xilinx.com Virtex-5 FPGA ML561 User Guide
UG199 (v1.2.1) June 15, 2009
Chapter 3: Hardware Description
R
Liquid Crystal Display Connector
Previous memory boards such as the ML461 had a DisplaytechQ 64128E-FC-BC-3LP
64x128 LCD panel. This display was removed from the ML561, but the connection is still
available for use with embedded systems if the user connects the display to connector
(P104). The LCD panel needs to hang off the edge of the board as shown in Figure 3-8.
VCC1V8_SENSE+ 13
VCC1V8_SENSE- 14
VCC1V8_MON 15
VCC1V5_SENSE+ 17
VCC1V5_SENSE- 18
VCC1V5_MON 19
VCC2V6_SENSE+ 21
VCC2V6_SENSE- 22
VCC2V6_MON 23
VCC5_SENSE+ 25
VCC5_SENSE- 26
VCC5_MON 24
VCC5 20
GND 4
GND 8
GND 12
GND 16
Table 3-15: Power Measurement Header Pins (P102) (Continued)
Header Signal Power Header Pin #

Xilinx Virtex-5 FPGA ML561 Specifications

General

Brand	Xilinx
Model	Virtex-5 FPGA ML561
Category	Motherboard
Language	English