Xilinx Virtex-4 User Manual

R
Virtex-4 FPGA
Embedded Tri-Mode
Ethernet MAC
User Guide
UG074 (v2.2) February 22, 2010
www.BDTIC.com/XILINX

Xilinx Virtex-4 Specifications

General

Brand	Xilinx
Model	Virtex-4
Category	Motherboard
Language	English

Summary

Chapter 1 Introduction

Features

Lists the key features and capabilities of the Virtex-4 FPGA Ethernet MAC.

Chapter 2 Ethernet MAC Architecture

Ethernet MAC Signal Descriptions

Defines and categorizes all signals of the Ethernet MAC primitive.

Chapter 3 Client, Host, and MDIO Interfaces

Client Interface

Explains the client interface design for flexibility in matching switching fabric or network processor interfaces.

Host Interface

Describes how to access Ethernet MAC registers and statistics via the host interface.

Chapter 4 Physical Interface

10/100/1000 Serial Gigabit Media Independent Interface (SGMII)

Explains the SGMII interface, its RX elastic buffer options, and clock management.

1000BASE-X PCS/PMA

Covers the 1000BASE-X PCS/PMA interface, its functional blocks, and clock management.

Chapter 6 Use Models

Interfacing to the Processor DCR

Shows sample code for accessing Ethernet MAC registers via the processor's DCR bus.

Interfacing to an FPGA Fabric-Based Statistics Block

Explains how to integrate Ethernet MAC statistics with a LogiCORE Statistics block via host bus or DCR bus.

Chapter 7 Using the Embedded Ethernet MAC

Accessing the Ethernet MAC from the CORE Generator tool