The line differential protection IED has no supervising function that could detect
the difference between asymmetric delay, buffer memory delay, telecommunication
network jitter and wander, and internal clock drift. The sum of these factors is
supervised by observing the deviation between the internal clocks in all IEDs.
GPSSyncErr denotes GPS synchronization error, and it is activated when GPS
global time and internal clock time deviate by more than 16 μs. If activated, the
differential protection function can be set to be blocked or the echo mode can be set
to be activated.
In an SDH network (≥ 2 Mbit/s) with an acceptably small asymmetric delay, for
example G.703 E1, maximum time deviation of 2 x ±300 μs can be used. In a PDH
network (n x 64 kbit/s) with a buffer memory of for example 100 μs, typical
maximum time deviation is 2 x ±400 μs. The actual setting value is to be calculated
accordingly.
2.3.1.2 Reference clock deviation from the set maximum time deviation
GUID-0FC23ED9-2CDB-48EE-ADDB-81D39E334F56 v1
Reference clock deviation lower than the set maximum time deviation
Route switching that causes the virtual difference between the internal clocks of
respective line differential protection IEDs to be lower than the set maximum time
deviation due to asymmetry in the communication channel delay, jitter and wander,
and buffer memory, does not cause a communication failure alarm or blocking of
the protection function. The deviation is considered to be within the accuracy
requirements, and will be compensated for by the normal synchronization
mechanisms of the internal clocks.
If route switching takes longer than 2 s, master and slave IEDs start to re-
synchronize after a 4 s delay incorporating the new channel asymmetry.
Synchronization adjusts the internal clock differences of differential protection
IEDs at different line ends to be within ±1 μs. Time synchronization messages are
evaluated every 5 ms. If maximum time deviation is set to ±200 μs, it takes
approximately 10 seconds to reach new synchronization. Synchronization reaches
the ±1 μs accuracy after an additional 10-15 seconds.
Reference clock deviation higher than the set maximum time
deviation
Route switching that causes the virtual difference between the internal clocks of
respective line differential protection IEDs to be higher that the set maximum time
deviation (±200-2000 μs) due to asymmetry in the communication channel delay,
jitter and wander, and buffer memory, causes the blocking of the internal clock
synchronization. If this deviation lasts under 2 s, the protection function still
remains in operation. The total stability time of 2 seconds stems from the route
switching being supervised during 50 internal clock synchronization messages that
are sent every 5 ms but evaluated every 40 ms.
If deviation between the internal clocks is higher than the set limit after 2 s, a
communication failure alarm is issued and the protection function gets blocked.
1MRK 505 382-UEN B Section 2
Telecommunication networks and line differential protection
Communication set-up 670/650 series 2.2 17
Application Guide
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