IEC15000467-1-en.vsd
fault
fault
fault
TOTAL COMPENSATED CURRENT IN PHASE L1
TOTAL COMPENSATED CURRENT IN PHASE L2
TOTAL COMPENSATED CURRENT IN PHASE L3
92 A subtracted
92 A subtracted
92 A subtracted
92 A subtracted
92 A subtracted from the fundamental
frequency differential current
92 A subtracted under fault
conditions
Tim e in seconds
CCC compensated
in app. 100 ms
IEC15000467 V1 EN-US
Figure 43: Charging current compensation using the approximate method
Charging current compensation is achieved 100 ms after simulation start when the
power line was switched on to normal load. Under normal load conditions,
approximately 92 A is subtracted, which results in all fundamental frequency
differential currents being close to zero. Since voltage profiles are not known, the
approximate method continues, even under fault conditions, to subtract the pre-
fault charging current of 92 A.
With low resistance faults, the 55 A difference of the approximate method in
comparison to the exact method, is relatively small when considering high fault
currents. With high-resistance faults, the charging current will not change much so
it is acceptable to continue subtracting it.
4.8 Configuration of binary signals
4.8.1 Operation principle
M12452-14 v5
In 64 kbit mode, communication takes place in standard ITU (CCITT) PCM digital
64 kbit/s channels. Communication is two-way, and telegrams are sent every 5 ms
(same in 50 Hz and 60 Hz) to exchange information between two IEDs. The format
used is C37.94, and one telegram consists of start and stop flags, address, data to be
transmitted, Cyclic Redundancy Check (CRC) and Yellow bit (which is associated
with C37.94).
en01000134.vsd
Start
flag
Information CRC
Stop
flag
8 bits n x 16 bits 8 bits16 bits
IEC01000134 V1 EN-US
Figure 44: Data message structure
1MRK 505 382-UEN B Section 4
Analog and binary signal transfer for line differential protection
Communication set-up 670/650 series 2.2 53
Application Guide
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