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Acer Aspire M1100 - Integrated Peripherals; South Onchip IDE Device; South Onchip PCI Device; Super IO Device

Acer Aspire M1100
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34 Chapter 2
Integrated Peripherals
South OnChip IDE Device
Press Enter to view the South OnChip IDE Device submenu. See “South OnChip IDE Device” on page 35.
South OnChip PCI Device
Press Enter to view the South OnChip IDE Device submenu. See “South OnChip PCI Device” on page 36.
Super IO Device
Press Enter to view the South OnChip PCI Device submenu. See “Super IO Device” on page 38.
Init Display First
Enables or disables the bus PCI Slot or Onboard/AGP.
Phoenix - Award WorkstationBIOS CMOS Setup Utility
Integrated Peripherals
X
South OnChip IDE Device [Press Enter]
Help Item
X
South OnChip PCI Device [Press Enter]
X
Super IO Device [Press Enter] Menu Level
X
Init Display First [PCIEx]
KLIJ
:Move Enter: Select +/-/PU/PD :Value F10: Save and Exit ESC:Exit
F1: General Help F5: Previous Values F7: Optimized Defaults

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