Advantech ROM-5620 - GPIO Test

ROM-5620 User Manual 30
Connect cable and ping test (eg. eth1)
4.1.11 GPIO Test
GPIO pin
Loop-back Test (Take GPIO4 and GPIO5 as examples)
Step 1: Connect GPIO4 and GPIO5
Step 2: Export GPIO interface
Step 3: Set direction
root@imx8qxrom5620a1:~# ping -I eth1 8 . 8 . 8 . 8
PING 8 . 8 . 8 . 8 (8 . 8 . 8 . 8) from 172 . 22 . 28 . 48 eth1: 56 (84) bytes
of data.
64 bytes from 8 . 8 . 8 . 8: icmp_seq=1 tt1=54 time=3.36 ms
64 bytes from 8 . 8 . 8 . 8: icmp_seq=2 tt1=54 time=3.15 ms
64 bytes from 8 . 8 . 8 . 8: icmp_seq=3 tt1=54 time=3.18 ms
^C
- - - 8 . 8 . 8 . 8 ping statistics - - -
3 packets transmitted, 3 received, 0% packet loss, time 2002ms
rtt min/avg/max/mdev = 3.157 / 3.235 / 3.363 / 0.091 ms
root@imx8qxrom5620a1:~#
SMARC
Pin #
SMARC Pin Name CPU Ball Name Number
Default
Direction
P108 GPIO0 / CAM0_PWR# SC_P_SPI2_CS0_LSIO_GPIO1_IO00 448 In
P109 GPIO1 / CAM1_PWR#
SC_P_SPI2_SCK_LSIO_G-
PIO1_IO03
451 In
P110 GPIO2 / CAM0_RST# SC_P_SPI2_SDI_LSIO_GPIO1_IO02 450 In
P111 GPIO3 / CAM1_RST#
SC_P_SPI2_SDO_LSIO_G-
PIO1_IO01
449 In
P112 GPIO4 / HAD_RST# SC_P_SPI0_CS0_LSIO_GPIO1_IO08 456 In
P113 GPIO5 / PWM_OUT
SC_P_SPI0_SCK_LSIO_G-
PIO1_IO04
452 In
P114 GPIO6 / TACHIN SC_P_SPI0_SDI_LSIO_GPIO1_IO05 453 In
P115 GPIO7
SC_P_MCLK_IN0_LSIO_G-
PIO0_IO19
499 In
P116 GPIO8
SC_P_SPI0_SDO_LSIO_G-
PIO1_IO06
454 In
P117 GPIO9
SC_P_CSI_PCLK_LSIO_G-
PIO3_IO00
384 In
P118 GPIO10
SC_P_CSI_MCLK_LSIO_G-
PIO3_IO01
385 In
P119 GPIO11 SC_P_CSI_EN_LSIO_GPIO3_IO02 386 In
root@imx8qxprom5620a1 : ~# echo 456 > /sys/class/gpio/export
root@imx8qxprom5620a1 : ~# echo 452 > /sys/class/gpio/export
root@imx8qxprom5620a1 : ~# echo out > /sys/class/gpio/gpio1/direction
root@imx8qxprom5620a1 : ~# echo in > /sys/class/gpio/gpio2/direction