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Aim-TTI MX100T - Status Commands

Aim-TTI MX100T
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Page 38
*OPC
Sets the Operation Complete bit (bit 0) in the Standard Event Status
Register. This will happen immediately the command is executed because
of the sequential nature of all operations.
*OPC?
Query Operation Complete status.
The response is always 1<RMT> and is available immediately the command
is executed because all commands are sequential.
*WAI
Wait for Operation Complete true.
This command does nothing because all operations are sequential.
*TST?
The product has no self-test capability and the response is always 0<
RMT
>.
*TRG
The product has no trigger capability. The command is ignored in this
instrument.
14.2.3 Status Commands
*CLS
Clear Status. Clears all status indications, including the Status Byte.
Does not clear any Enable Registers.
LSR<N>? Query and clear the Limit Status Register<N>. The response format is
<
NR1><RMT>. See Status Reporting section for details of the response.
LSE<
N> <NRF> Set the Limit Status Enable Register<N> to <NRF>
LSE<
N>? Returns the value in the value in the Limit Status Enable Register<N>.
The response format is<
NR1><RMT>.
EER?
Query and clear Execution Error Register. The response format is
<NR1><RMT>.
QER?
Query and clear Query Error Register. The response format is
<NR1><RMT>.
*STB?
Report the value of the Status Byte. The response is: <
NR
1><
RMT
>.
Because there is no output queue, MAV can only be read by a GPIB serial
poll, not by this query, as any previous message must have already been
sent.
*SRE <
NRF
>
Sets the Service Request Enable Register to <
NRF
>
*SRE?
Report the value in the Service Request Enable Register.
The response is <NR1><RMT>.
*PRE <
NRF
>
Set the Parallel Poll Enable Register to the value <
NRF
>.
*PRE?
Report the value in the Parallel Poll Enable Register.
The response is <NR1><RMT>.
*IST?
Returns the state of the ist local message as defined by IEEE Std. 488.2.
The response is 0<RMT> if the local message is false, or 1<RMT> if true.

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