Akai VS-2EGN - Page 23

The
PB
low
frequency
converted
CHROMA
signal
is
fed
to
IC10
pin
.
The
lower
and
upper
side
bands
of
4.43
MHz
and
5.686
MHz
(PAL)
or
5.689
MHz
(NTSC)
are
output
to
pin
(2)
from
the
balanced
modulator,
and
only
the
lower
side
band
is
selected
as
it
passes
through
the
4.43
BPF.
This
PB
frequency-converted
CHROMA
signal
has the
jitter
component
IAF.
Since
4) PAL PB AFC system
BB
CHROMA OU’
the output of IC11 (AN6371) pin (8) also has a jitter
component IAF, this IAF is similarly fed to IC10 pin
(2. Since the response of the APC system is very fast, if
the time delay between the IAF fed to pin (©) and the
IAF fed to pin @ is zero, they are mutually cancelled
completely, and the jitter component can be removed.
4.43MHe (0°
1
P.B BURST
URST GATE 3 t
ne Le
1 1
~o-+| mucer Lol io LoG
| 1
1 he
=
x1, 2¢4,433619%N2
-O-O----
tot
i
5
I
I
i \ 6
\ i ey
| | pe ‘a
3 1
52
d | g \
| | 2 I
H ! OELAY |
|
%0
H | \ v
H fant woot} @< + S284 @e faa. woot)
i}
ih ce
P.B CHROMA IN,
626.9KHz (-90")
Osea (-90")
1
ae
es apes a
i}
|
|
Liwiver|_,[
PHASS
veo
|
[eo%
norarvle|
MM (COMPARATOR) ~| ROTARY ‘SWITCHING
\
ML
i;
own
!
por
cate]
[760.8
fs
va
eS
| HO a)
|
jeate
|
F
\
FIELD
REC
cc
:
start
iNKiBIT
[=
boc
EE
(av
1 cue
Pg
viocoo—>G)->{
SYNC
SEPA
|
Gono
IN
1
U
bas
i
So, a
+
(360°)
KILLER o°
Fig. 7-11 PAL PB AFC Block Diagram
P-COM
OUT
|
arc
—Sl<—
(10 pulse generation )
The PB low frequency converted CHROMA signal fed
to IC10 pin ( is converted to 4.43 MHz CHROMA by
the balanced modulator, and output from pin asa
PB CHROMA signal. A PB BURST signal output from
IC10 pin ,, is obtained from sampling by the time de-
layed burst gate pulse connected to pin 4). This PB
BURST signal is fed to IC11 pin (3), and phase detected
by the 4.43 MHz XO connected to pin(6). If the phase
20
Service Manual VS-2EGN
ale arc
(10 pulse generation)
Fig. 7-12 ID Pulse System
APC
difference is between 180° and 360° , an ID pulse is
generated from pin ({). As the ID pulse enters IC9
(AN6362) pin (9, the rotary control circuit starts from
the phase to which its 90° rotary circuit made a —90°
shift. Accordingly, the phase of the output from pin
@ changes by —90° , reducing the phase difference
between the PB BURST and the XO so it comes within
the range allowing the APC system to lock.