Akai VS-2EGN

5-2. RESET RELATED CIRCUITS
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Fig. 7-77 is the wiring diagram of reset related circuits.
LF (Line Frequency) is a signal as shown in Fig. 7-78.
The ICI comparator output (pin (1) ) becomes LOW
when LF exceeds 2.1V (determined by R3 and R4),
and becomes HIGH when LF falls below 0.6V (forward
voltage of D3). Since LF is supplied from the power
line, when it becomes LOW or nonexistent due to power
failure or else, IC1 pin @ immediately becomes OV via
R1, and the output (IC1 pin) becomes HIGH.
When IDL 5V exceeds the threshold voltage of [C2, a
series of changes as follows take place.
1C2 pin D/Q-~ ‘H’ ~1C2 pin@)-— ‘L’ ~ C6 charge
(C6x R12) —IC2 pin @3— ‘’ a
IC2 pin e gp IC? Pin) —L
However, when charging of C6 is completed at a time
determined by C6 and R12.
IC2 pin -V . ap
1C2 pin § gpI? pin @ - 4
When the power is switched on, a negative pulse J”)
can be supplied to IC2 pin ((}). RESET pulse is sent to
the microcomputer (IC7) of the Operation Board and
the microcomputer of the system control for effecting
reset... When the RESET pulse is output from IC2 pin
@), the potential of IC2 pin ©) becomes LOW only
after about 60 ms which is determined by the time cons-
tant of R13 and C8. Asa result, IC2 pin @O(EXT RAM
CE) becomes HIGH , and EXT RAM can be accessed.
Fig. 7-78 shows the waveform at each part at the power
input sequence.
Service Manual VS-2EGN
62
Fig. 7-77 Reset Related Circuits
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Fig. 7-78 Line Frequency (LF)
Fig. 7-80 shows the signal waveform at power down
time.
In Fig. 7-77, at power down, first LF becomes non-
existent, then the voltage at ICI pin © starts rising
under the control of the time constant determined by
R6 and CS, IC1 pin (7) becomes LOW when this volt-
age exceeds 2.5V, As a result POWER DOWN is out-
put, and it is sent to the front processor pin (9. Ac-
cording to this data, the front processor saves all re-
quired data by storing it in the external RAM in about
8 ms, brings PROT to LOW level to prevent the con-
tent of the external RAM from changing, and sends this
information to IC2 pin). Flip-flop (IC2) is reset there-
by, IC2 pin (Q (EXT RAM CE) becomes LOW, and
EXT RAM can no longer be accessed, so that the con-
tents are protected.