Akai VS-2EGN

i
5-10
SYSTEM
CONTROL
CIRCUIT
AND
SERIAL
DATA
TRANSFER
ie ke — 20ms—a1
'2ms ! 1
| lems | i
be—— 32ms-——>}
: (1 Cycle) !
2
Z
/ Tword
J
° 1 1
FR HEADER
oats CON aie ert
POWER CH UP
SYSCON EMG CH DWN
—>FRONT TEN EE
Com-
grand KEY LED
(Code.
0 EJECT STD-BY
di FF FF
2 REW REW
3 STOP STOP
4 - REC-PAUSE
5 REC REC
6 PLAY PLAY
7 CUE CUE
8 REVIEW REVIEW
9 PAUSE STOPPAUSE
A C-RESET PLAYPAUSE
POWER
;
F-ON
B
MEMORY
es
EMG
;
Emergency
c
F-ON
DISP
TMEN
;
Timer
Enable
D
F-OFF
TMSTDBY
CH
UP
;
Channel
Up
E
=
-
CH
DWN
_
;
Channel
Down
F
-
=
VS.2EGN outputs transfer clock from SC (pin @) of
the front processor. Data is output to So at the trailing
edge of this SC, and Si data is read at the leading edge.
Conversely, the SYSCON reads data at the trailing edge
of SC, and outputs the next data at the same time. Ac-
cordingly, direct connection of SC of both microcom-
puters will result in erroneous data reading. Therefore,
SC is inverted at TR3, and is sent to SYSCON as an S.
70
Service Manual VS-2EGN
F-ON: Function SW ON
Fig. 7-95 Data Transfer Format
CLK instruction.
1) Transfer format
Data transfer between the front microcomputer and the
system microcomputer is performed according to the
transfer clock of the front microcomputer.
One cycle transfer is completed with seven 4-bit words.
Fig. 7-95 shows the transfer format.