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AMD Xilinx ZCU670 - Page 60

AMD Xilinx ZCU670
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Table 22: ZCU670 Power System Devices
Ref. Des., PMBUS
ADDR
Controller or
Regulator
Rail Name
Voltage
(V)
Max.
Current (A)
INA226
Power
Monitor
INA226
PMBUS
ADDR
Sense
Resistor (Ω)
Schem.
Page
PMIC1 U104 (0X40)
IR35215_PWM1/2 V
CCINT
0.85 60 U65 0x40 R440: 0.0005
44
IR35215_PWM1_L2 V
CCINT_AMS
0.85 28 U61 0x49 R1098:
0.0005
PMIC2 U53 (0X44)
IRPS5401_A V
CC1V2
1.2 6 U58 0x43 R408: 0.005
47
IRPS5401_B UTIL_1V13 1.13 500 mA NA NA NA
IRPS5401_C VADJ_FMC
1.8 6 U62 0x45 R382: 0.005
IRPS5401_D Tied to channel C
IRPS5401_LDO MGT1V8 1.8 500 mA U64 0x48 R787: 0.005
PMIC3 U55 (0X45)
IRPS5401_A NC NA NA NA NA NA
49
IRPS5401_B UTIL_2V5 2.5 500 mA NA NA NA
IRPS5401_C MGT1V2_BUS
1.2 7 U63 0x47 R400: 0.002
IRPS5401_D Tied to C
IRPS5401_LDO MGTRAVCC 0.85 500 mA NA NA NA
U127 (0X4B) IR38164 V
CCINT_IO_BRAM_PS_BUS
0.85 18 U57 0x41
R1099:
0.0005
50
U112 (0x43) IR38164 MGTAVCC_BUS 0.9 4 U67 0x46 R455: 0.002 51
U123 (0x4C) IR38164 VCC1V8_BUS 1.8 8 U60 0x42 R879: 0.002 52
U115 MPM3683-7 ADC_AVCC_BUS 1.01 4 U75 0x4C R499: 0.005 53
U116 MPM3683-7 DAC_AVCC_BUS 0.925 6 U77 0x4E R504: 0.005 53
U114 MPM3833C ADC_AVCCAUX 1.8 2 U71 0x4D R475: 0.005 54
U125 MPM3833C DAC_AVCCAUX 1.8 1.5 U124 0x4B R889: 0.005 55
U118 MPM3833C DAC_AVTT_BUS 2.5/3.0 1.5 U59 0x4A R869: 0.005 55
U111 IR3889 UTIL_3V3 3.3 15 NA NA NA 57
U126 IR3889 UTIL_5V0 5 10 NA NA NA 58
U79 TPS51200 PL_DDR4_C0_VTT 0.6 +/- 3.0 NA NA NA 59
The FMCP HSPC (J28) V
ADJ
pins and RFSoC U1 banks 66 and 67 V
CCO
pins are wired to the
programmable rail VADJ_FMC. The VADJ_FMC rail is programmed to 1.80V by default.
Documentaon describing PMBUS programming for the Inneon power controllers as well as
PMIC and voltage regulator data sheets are available on the Inneon Integrated Circuits website.
Non-PMBus ADC and DAC voltage regulator data sheets can be viewed on the MPS website.
The PCB layout and power system design meet the recommended criteria described in the
UltraScale Architecture PCB Design User Guide (UG583).
RECOMMENDED:
To ensure reliable operaon, Xilinx recommends running the
report_power
command in the Vivado tools for designs targeng this board. The reported rail current requirements must
not exceed the values listed in the following table.
Chapter 3: Board Component Descriptions
UG1532 (v1.0) March 30, 2022 www.xilinx.com
ZCU670 Board User Guide 60
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