AOC LM927U - 6 Schematic; Main Board

AOC LM927U
19
6. Schematic
6.1 Main Board
715L1150-B
VCC2.5
VLCD
VCPU
VAA1
PA[0..9]
VAA3VAA2
VLCD
VAA4
B2
4.SCALER
RIN
GIN
SOG
BIN
GNDR
GNDG
GNDB
HSYNC
VSYNC
R+
R-
G-
G+
B+
B-
CLK+
CLK-
CSZ
SCL
SDA
HWRESET
INT
Volume
AdjBACKLITE
PA[0..9]
PB[0..9]
VCC2.5
VCC3.3
VAA1
VAA2
VAA3
VAA4
DDC_CLK
DDC_DAT
B1
3.INPUT
RIN
GIN
BIN
VSYNC
GNDR
GNDG
GNDB
ST_DET1 HSYNC
SOGDDC_CLK
DDC_DAT
ST_DET2
R+
R-
G-
G+
B+
B-
CLK+
CLK-
B5
5.PANEL INTERFACE
VLCD
PB[0..9]
PA[0..9]
MST8131A SCHEMATIC
VCC3.3
VAA1
TOP
A
MST8131A for AOC
B
16Friday, March 26, 2004
Title
Size Document Number Rev
Date: Sheet
of
VCC5V
VCC12V
B4
2.POWER
onPanel_5V/3.3V
onBACKLITE
AdjBACKLITE
VCC3.3
VCC2.5
VAA1
VAA2
VAA3
VAA4
VCC5V
VCC12V
VLCD
VCPU
VAA2
VCPU
PB[0..9]
B3
6.MCU
onBACKLITE
ST_DET2
onPANEL_5V/3.3V
SDA
INT
CSZ
DDC_DAT
ST_DET1
SCL
HWRESET
DDC_CLK
Volume
VCC5V
VCC12V
VCPU
VAA3
VCC12V VCC5V
VAA4VCC3.3
VCC2.5
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