95
8271D–AVR–05/11
ATmega48A/PA/88A/PA/168A/PA/328/P
14.4.8 PORTD – The Port D Data Register
14.4.9 DDRD – The Port D Data Direction Register
14.4.10 PIND – The Port D Input Pins Address
(1)
Note: 1. Writting to the pin register provides toggle functionality for IO (see ”Toggling the Pin” on page
79)
Bit 76543210
0x0B (0x2B)
PORTD7 PORTD6 PORTD5 PORTD4 PORTD3 PORTD2 PORTD1 PORTD0 PORTD
Read/Write R/W R/W R/W R/W R/W R/W R/W R/W
Initial Value 0 0 0 0 0 0 0 0
Bit 76543210
0x0A (0x2A) DDD7 DDD6 DDD5 DDD4 DDD3 DDD2 DDD1 DDD0 DDRD
Read/Write R/W R/W R/W R/W R/W R/W R/W R/W
Initial Value 0 0 0 0 0 0 0 0
Bit 76543210
0x09 (0x29) PIND7 PIND6 PIND5 PIND4 PIND3 PIND2 PIND1 PIND0 PIND
Read/Write R/W R/W R/W R/W R/W R/W R/W R/W
Initial Value N/A N/A N/A N/A N/A N/A N/A N/A