Avnet PicoZed 7010 User Manual

3-Feb-2015
24
3 Zynq-7000 AP SoC I/O Bank Allocation
3.1 PS MIO Allocation
There are 54 I/O available in the PS MIO. The table below lists the number of required I/O per
peripheral and the MIO locations where the interface exists.
Table 17 – PS MIO Interface Requirements
Interface
I/O Required
MIO
QSPI FLASH
7
1-6, 8
USB Host
13
7, 28-39
ETHERNET
15
16-27, 47, 52-53
eMMC / Micro Header
General Purpose
6
10-15
Micro Header
General Purpose
13
0, 9, 40-46, 48-51
TOTAL
54
The Micro Header GPIO assignments aren’t specifically defined interfaces such as those that are
defined in Table 17. The table below provides the MIO locations of the PS MIO general purpose
pins and the functions that they are intended to support. The end user is encouraged to utilize the
Zynq TRM in defining the MIO peripheral mappings that they would like to utilize on a custom
PicoZed carrier card.
Table 18 – PS GPIO Assignments
MIO
Voltage
Function
7
3.3V
USB RESET
8
3.3V
QSPI FB CLK
0, 9
3.3V
PS GPIO
10-15
3.3V
eMMC or PS GPIO
40-46, 48-51
1.8V
PS GPIO
47
1.8V
PS GPIO or ETHERNET RESET

Avnet PicoZed 7010 Specifications

General

Brand	Avnet
Model	PicoZed 7010
Category	Control Unit
Language	English