Avnet PicoZed 7010 User Manual

3-Feb-2015
7
Table 4 – USB 2.0 JX3 Pin Assignments
Signal Name
JX3 Pin
USB_OTG_N
69
USB_OTG_P
67
USB_ID
63
USB_OTG_CPEN
70
If using the Avnet PicoZed FMC Carrier Card as the mating carrier card, a Micro-AB connector
provided by FCI is used. The FCI part number is 10104111-0001LF.
The usb0 peripheral is used on the PS, connected through MIO[28-39] in MIO Bank 1/501. The
USB Reset signal is connected to MIO[7]. Signal PS_MIO7 is a 3.3V signal. It is AND-ed with the
power-on reset (PG_MODULE) signal and then level shifted to 1.8V through a TI TXS0102 level
translator before connecting to the USB3320 Pin 27 RESET.
PicoZed 7010/7020 is configured such that either Host Mode (OTG) or Device Mode can be used
depending on the circuitry of the carrier card. With a standard connection to a baseboard (no
power supply used to provide USB power to the connector) the device will operate in Device
Mode. Using the USB_OTG_CPEN signal on JX3 allows the user to control an external power
source for USB VBUS on the carrier card. Other considerations need to be made to
accommodate Host Mode. Refer to the Avnet PicoZed FMC Carrier Card design for an example
design for configuring the carrier card for either Host Mode or Device Mode.
Table 5 – USB 2.0 Pin Assignment and Definitions
Signal Name
Description
Zynq Bank
MIO
SMSC
3320 Pin
Data[7:0]
USB Data lines
MIO Bank 1/501
28:39
Data[7:0]
CLKOUT
USB Clock
MIO Bank 1/501
1
DIR
ULPI DIR output signal
MIO Bank 1/501
31
STP
ULPI STP input signal
MIO Bank 1/501
29
NXT
ULPI NXT output signal
MIO Bank 1/501
2
REFSEL[2:0]
USB Chip Select
N/C
N/C
8,11,14
DP
DP pin of USB Connector
18
DM
DM pin of USB Connector
19
ID
Identification pin of the
USB connector
23
RESET_B
Reset
MIO Bank 1/501
7**
27**
** Connected through AND-gate with PG_MODULE through level translator (TI TXS0102DQE).
2.4 10/100/1000 Ethernet PHY
PicoZed 7010/7020 implements a 10/100/1000 Ethernet port for network connection using a
Marvell 88E1512 PHY. This part operates at 1.8V. The PHY connects to MIO Bank 1/501 (1.8V)
and interfaces to the Zynq-7000 AP SoC via RGMII.
The RJ-45 interface signals are connected to the JX3 Micro Header.
A high-level block diagram the 10/100/1000 Ethernet interface is shown in the following figure.

Avnet PicoZed 7010 Specifications

General

Brand	Avnet
Model	PicoZed 7010
Category	Control Unit
Language	English